blob: e494fe2291e34581b197fa258e37966fb5b7435a [file] [log] [blame]
Akira Hatanaka7398bf02011-12-07 21:48:50 +00001; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=MIPS32-EL
2; RUN: llc < %s -march=mips | FileCheck %s -check-prefix=MIPS32-EB
3; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=MIPS64
Akira Hatanaka9c3d57c2011-05-25 19:32:07 +00004
5define double @func0(double %d0, double %d1) nounwind readnone {
6entry:
Akira Hatanaka7398bf02011-12-07 21:48:50 +00007; MIPS32-EL: func0:
Akira Hatanaka7398bf02011-12-07 21:48:50 +00008; MIPS32-EL: mfc1 $[[HI0:[0-9]+]], $f15
Akira Hatanakaf06cb2b2011-12-19 20:21:18 +00009; MIPS32-EL: lui $[[MSK1:[0-9]+]], 32768
Akira Hatanaka7398bf02011-12-07 21:48:50 +000010; MIPS32-EL: and $[[AND1:[0-9]+]], $[[HI0]], $[[MSK1]]
11; MIPS32-EL: lui $[[T0:[0-9]+]], 32767
12; MIPS32-EL: ori $[[MSK0:[0-9]+]], $[[T0]], 65535
13; MIPS32-EL: mfc1 $[[HI1:[0-9]+]], $f13
14; MIPS32-EL: and $[[AND0:[0-9]+]], $[[HI1]], $[[MSK0]]
15; MIPS32-EL: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]]
16; MIPS32-EL: mfc1 $[[LO0:[0-9]+]], $f12
17; MIPS32-EL: mtc1 $[[LO0]], $f0
18; MIPS32-EL: mtc1 $[[OR]], $f1
Akira Hatanaka9c3d57c2011-05-25 19:32:07 +000019;
Akira Hatanaka7398bf02011-12-07 21:48:50 +000020; MIPS32-EB: mfc1 $[[HI1:[0-9]+]], $f14
Akira Hatanakaf06cb2b2011-12-19 20:21:18 +000021; MIPS32-EB: lui $[[MSK1:[0-9]+]], 32768
Akira Hatanaka7398bf02011-12-07 21:48:50 +000022; MIPS32-EB: and $[[AND1:[0-9]+]], $[[HI1]], $[[MSK1]]
23; MIPS32-EB: lui $[[T0:[0-9]+]], 32767
24; MIPS32-EB: ori $[[MSK0:[0-9]+]], $[[T0]], 65535
25; MIPS32-EB: mfc1 $[[HI0:[0-9]+]], $f12
26; MIPS32-EB: and $[[AND0:[0-9]+]], $[[HI0]], $[[MSK0]]
27; MIPS32-EB: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]]
28; MIPS32-EB: mfc1 $[[LO0:[0-9]+]], $f13
29; MIPS32-EB: mtc1 $[[OR]], $f0
30; MIPS32-EB: mtc1 $[[LO0]], $f1
31
32; MIPS64: dmfc1 $[[R0:[0-9]+]], $f13
33; MIPS64: and $[[R1:[0-9]+]], $[[R0]], ${{[0-9]+}}
34; MIPS64: dmfc1 $[[R2:[0-9]+]], $f12
35; MIPS64: and $[[R3:[0-9]+]], $[[R2]], ${{[0-9]+}}
36; MIPS64: or $[[R4:[0-9]+]], $[[R3]], $[[R1]]
37; MIPS64: dmtc1 $[[R4]], $f0
Akira Hatanaka9c3d57c2011-05-25 19:32:07 +000038 %call = tail call double @copysign(double %d0, double %d1) nounwind readnone
39 ret double %call
40}
41
42declare double @copysign(double, double) nounwind readnone
43
44define float @func1(float %f0, float %f1) nounwind readnone {
45entry:
Akira Hatanaka7398bf02011-12-07 21:48:50 +000046; MIPS32-EL: func1:
Akira Hatanaka7398bf02011-12-07 21:48:50 +000047; MIPS32-EL: mfc1 $[[ARG1:[0-9]+]], $f14
Akira Hatanakaf06cb2b2011-12-19 20:21:18 +000048; MIPS32-EL: lui $[[MSK1:[0-9]+]], 32768
Akira Hatanaka7398bf02011-12-07 21:48:50 +000049; MIPS32-EL: and $[[T3:[0-9]+]], $[[ARG1]], $[[MSK1]]
50; MIPS32-EL: lui $[[T0:[0-9]+]], 32767
51; MIPS32-EL: ori $[[MSK0:[0-9]+]], $[[T0]], 65535
52; MIPS32-EL: mfc1 $[[ARG0:[0-9]+]], $f12
53; MIPS32-EL: and $[[T2:[0-9]+]], $[[ARG0]], $[[MSK0]]
54; MIPS32-EL: or $[[T4:[0-9]+]], $[[T2]], $[[T3]]
55; MIPS32-EL: mtc1 $[[T4]], $f0
Akira Hatanaka9c3d57c2011-05-25 19:32:07 +000056 %call = tail call float @copysignf(float %f0, float %f1) nounwind readnone
57 ret float %call
58}
59
60declare float @copysignf(float, float) nounwind readnone