| Akira Hatanaka | 7398bf0 | 2011-12-07 21:48:50 +0000 | [diff] [blame^] | 1 | ; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=MIPS32-EL |
| 2 | ; RUN: llc < %s -march=mips | FileCheck %s -check-prefix=MIPS32-EB |
| 3 | ; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=MIPS64 |
| Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 4 | |
| 5 | define double @func0(double %d0, double %d1) nounwind readnone { |
| 6 | entry: |
| Akira Hatanaka | 7398bf0 | 2011-12-07 21:48:50 +0000 | [diff] [blame^] | 7 | ; MIPS32-EL: func0: |
| 8 | ; MIPS32-EL: lui $[[T1:[0-9]+]], 32768 |
| 9 | ; MIPS32-EL: ori $[[MSK1:[0-9]+]], $[[T1]], 0 |
| 10 | ; MIPS32-EL: mfc1 $[[HI0:[0-9]+]], $f15 |
| 11 | ; MIPS32-EL: and $[[AND1:[0-9]+]], $[[HI0]], $[[MSK1]] |
| 12 | ; MIPS32-EL: lui $[[T0:[0-9]+]], 32767 |
| 13 | ; MIPS32-EL: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 |
| 14 | ; MIPS32-EL: mfc1 $[[HI1:[0-9]+]], $f13 |
| 15 | ; MIPS32-EL: and $[[AND0:[0-9]+]], $[[HI1]], $[[MSK0]] |
| 16 | ; MIPS32-EL: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] |
| 17 | ; MIPS32-EL: mfc1 $[[LO0:[0-9]+]], $f12 |
| 18 | ; MIPS32-EL: mtc1 $[[LO0]], $f0 |
| 19 | ; MIPS32-EL: mtc1 $[[OR]], $f1 |
| Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 20 | ; |
| Akira Hatanaka | 7398bf0 | 2011-12-07 21:48:50 +0000 | [diff] [blame^] | 21 | ; MIPS32-EB: lui $[[T1:[0-9]+]], 32768 |
| 22 | ; MIPS32-EB: ori $[[MSK1:[0-9]+]], $[[T1]], 0 |
| 23 | ; MIPS32-EB: mfc1 $[[HI1:[0-9]+]], $f14 |
| 24 | ; MIPS32-EB: and $[[AND1:[0-9]+]], $[[HI1]], $[[MSK1]] |
| 25 | ; MIPS32-EB: lui $[[T0:[0-9]+]], 32767 |
| 26 | ; MIPS32-EB: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 |
| 27 | ; MIPS32-EB: mfc1 $[[HI0:[0-9]+]], $f12 |
| 28 | ; MIPS32-EB: and $[[AND0:[0-9]+]], $[[HI0]], $[[MSK0]] |
| 29 | ; MIPS32-EB: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] |
| 30 | ; MIPS32-EB: mfc1 $[[LO0:[0-9]+]], $f13 |
| 31 | ; MIPS32-EB: mtc1 $[[OR]], $f0 |
| 32 | ; MIPS32-EB: mtc1 $[[LO0]], $f1 |
| 33 | |
| 34 | ; MIPS64: dmfc1 $[[R0:[0-9]+]], $f13 |
| 35 | ; MIPS64: and $[[R1:[0-9]+]], $[[R0]], ${{[0-9]+}} |
| 36 | ; MIPS64: dmfc1 $[[R2:[0-9]+]], $f12 |
| 37 | ; MIPS64: and $[[R3:[0-9]+]], $[[R2]], ${{[0-9]+}} |
| 38 | ; MIPS64: or $[[R4:[0-9]+]], $[[R3]], $[[R1]] |
| 39 | ; MIPS64: dmtc1 $[[R4]], $f0 |
| Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 40 | %call = tail call double @copysign(double %d0, double %d1) nounwind readnone |
| 41 | ret double %call |
| 42 | } |
| 43 | |
| 44 | declare double @copysign(double, double) nounwind readnone |
| 45 | |
| 46 | define float @func1(float %f0, float %f1) nounwind readnone { |
| 47 | entry: |
| Akira Hatanaka | 7398bf0 | 2011-12-07 21:48:50 +0000 | [diff] [blame^] | 48 | ; MIPS32-EL: func1: |
| 49 | ; MIPS32-EL: lui $[[T1:[0-9]+]], 32768 |
| 50 | ; MIPS32-EL: ori $[[MSK1:[0-9]+]], $[[T1]], 0 |
| 51 | ; MIPS32-EL: mfc1 $[[ARG1:[0-9]+]], $f14 |
| 52 | ; MIPS32-EL: and $[[T3:[0-9]+]], $[[ARG1]], $[[MSK1]] |
| 53 | ; MIPS32-EL: lui $[[T0:[0-9]+]], 32767 |
| 54 | ; MIPS32-EL: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 |
| 55 | ; MIPS32-EL: mfc1 $[[ARG0:[0-9]+]], $f12 |
| 56 | ; MIPS32-EL: and $[[T2:[0-9]+]], $[[ARG0]], $[[MSK0]] |
| 57 | ; MIPS32-EL: or $[[T4:[0-9]+]], $[[T2]], $[[T3]] |
| 58 | ; MIPS32-EL: mtc1 $[[T4]], $f0 |
| Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 59 | %call = tail call float @copysignf(float %f0, float %f1) nounwind readnone |
| 60 | ret float %call |
| 61 | } |
| 62 | |
| 63 | declare float @copysignf(float, float) nounwind readnone |