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Evan Cheng09e8ca82008-10-20 21:44:59 +00001//===-- PreAllocSplitting.cpp - Pre-allocation Interval Spltting Pass. ----===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the machine instruction level pre-register allocation
11// live interval splitting pass. It finds live interval barriers, i.e.
12// instructions which will kill all physical registers in certain register
13// classes, and split all live intervals which cross the barrier.
14//
15//===----------------------------------------------------------------------===//
16
17#define DEBUG_TYPE "pre-alloc-split"
18#include "llvm/CodeGen/LiveIntervalAnalysis.h"
Evan Chengf5cd4f02008-10-23 20:43:13 +000019#include "llvm/CodeGen/MachineFrameInfo.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000020#include "llvm/CodeGen/MachineFunctionPass.h"
21#include "llvm/CodeGen/MachineLoopInfo.h"
22#include "llvm/CodeGen/MachineRegisterInfo.h"
23#include "llvm/CodeGen/Passes.h"
24#include "llvm/CodeGen/RegisterCoalescer.h"
Evan Chengf5cd4f02008-10-23 20:43:13 +000025#include "llvm/Target/TargetInstrInfo.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000026#include "llvm/Target/TargetMachine.h"
27#include "llvm/Target/TargetOptions.h"
28#include "llvm/Target/TargetRegisterInfo.h"
29#include "llvm/Support/CommandLine.h"
30#include "llvm/Support/Debug.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000031#include "llvm/ADT/SmallPtrSet.h"
Evan Chengf5cd4f02008-10-23 20:43:13 +000032#include "llvm/ADT/Statistic.h"
33#include <map>
Evan Cheng09e8ca82008-10-20 21:44:59 +000034using namespace llvm;
35
Evan Chengf5cd4f02008-10-23 20:43:13 +000036STATISTIC(NumSplit , "Number of intervals split");
37
Evan Cheng09e8ca82008-10-20 21:44:59 +000038namespace {
39 class VISIBILITY_HIDDEN PreAllocSplitting : public MachineFunctionPass {
Evan Chengf5cd4f02008-10-23 20:43:13 +000040 MachineFunction *CurMF;
41 const TargetMachine *TM;
42 const TargetInstrInfo *TII;
43 MachineFrameInfo *MFI;
44 MachineRegisterInfo *MRI;
45 LiveIntervals *LIs;
Evan Cheng09e8ca82008-10-20 21:44:59 +000046
Evan Chengf5cd4f02008-10-23 20:43:13 +000047 // Barrier - Current barrier being processed.
48 MachineInstr *Barrier;
49
50 // BarrierMBB - Basic block where the barrier resides in.
51 MachineBasicBlock *BarrierMBB;
52
53 // Barrier - Current barrier index.
54 unsigned BarrierIdx;
55
56 // CurrLI - Current live interval being split.
57 LiveInterval *CurrLI;
58
59 // LIValNoSSMap - A map from live interval and val# pairs to spill slots.
60 // This records what live interval's val# has been split and what spill
61 // slot was used.
62 std::map<std::pair<unsigned, unsigned>, int> LIValNoSSMap;
63
Evan Cheng06587492008-10-24 02:05:00 +000064 // RestoreMIs - All the restores inserted due to live interval splitting.
65 SmallPtrSet<MachineInstr*, 8> RestoreMIs;
66
Evan Cheng09e8ca82008-10-20 21:44:59 +000067 public:
68 static char ID;
69 PreAllocSplitting() : MachineFunctionPass(&ID) {}
70
71 virtual bool runOnMachineFunction(MachineFunction &MF);
72
73 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
74 AU.addRequired<LiveIntervals>();
75 AU.addPreserved<LiveIntervals>();
Evan Cheng09e8ca82008-10-20 21:44:59 +000076 AU.addPreserved<RegisterCoalescer>();
77 if (StrongPHIElim)
78 AU.addPreservedID(StrongPHIEliminationID);
79 else
80 AU.addPreservedID(PHIEliminationID);
Evan Cheng09e8ca82008-10-20 21:44:59 +000081 MachineFunctionPass::getAnalysisUsage(AU);
82 }
83
84 virtual void releaseMemory() {
Evan Chengf5cd4f02008-10-23 20:43:13 +000085 LIValNoSSMap.clear();
Evan Cheng06587492008-10-24 02:05:00 +000086 RestoreMIs.clear();
Evan Cheng09e8ca82008-10-20 21:44:59 +000087 }
88
89 virtual const char *getPassName() const {
90 return "Pre-Register Allocaton Live Interval Splitting";
91 }
Evan Chengf5cd4f02008-10-23 20:43:13 +000092
93 /// print - Implement the dump method.
94 virtual void print(std::ostream &O, const Module* M = 0) const {
95 LIs->print(O, M);
96 }
97
98 void print(std::ostream *O, const Module* M = 0) const {
99 if (O) print(*O, M);
100 }
101
102 private:
103 MachineBasicBlock::iterator
104 findNextEmptySlot(MachineBasicBlock*, MachineInstr*,
105 unsigned&);
106
107 MachineBasicBlock::iterator
108 findSpillPoint(MachineBasicBlock*, MachineInstr*,
109 SmallPtrSet<MachineInstr*, 4>&, unsigned&);
110
111 MachineBasicBlock::iterator
112 findRestorePoint(MachineBasicBlock*, MachineInstr*,
113 SmallPtrSet<MachineInstr*, 4>&, unsigned&);
114
115 void RecordSplit(unsigned, unsigned, unsigned, int);
116
117 bool isAlreadySplit(unsigned, unsigned, int&);
118
119 void UpdateIntervalForSplit(VNInfo*, unsigned, unsigned);
120
121 bool ShrinkWrapToLastUse(MachineBasicBlock*,
Evan Cheng06587492008-10-24 02:05:00 +0000122 SmallVector<MachineOperand*, 4>&,
123 SmallPtrSet<MachineInstr*, 4>&);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000124
125 void ShrinkWrapLiveInterval(VNInfo*, MachineBasicBlock*,
126 MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*, 8>&,
Evan Cheng06587492008-10-24 02:05:00 +0000127 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >&,
128 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >&,
129 SmallVector<MachineBasicBlock*, 4>&);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000130
131 bool SplitRegLiveInterval(LiveInterval*);
132
133 bool SplitRegLiveIntervals(const TargetRegisterClass **);
Evan Cheng09e8ca82008-10-20 21:44:59 +0000134 };
135} // end anonymous namespace
136
137char PreAllocSplitting::ID = 0;
138
139static RegisterPass<PreAllocSplitting>
140X("pre-alloc-splitting", "Pre-Register Allocation Live Interval Splitting");
141
142const PassInfo *const llvm::PreAllocSplittingID = &X;
143
Evan Chengf5cd4f02008-10-23 20:43:13 +0000144
145/// findNextEmptySlot - Find a gap after the given machine instruction in the
146/// instruction index map. If there isn't one, return end().
147MachineBasicBlock::iterator
148PreAllocSplitting::findNextEmptySlot(MachineBasicBlock *MBB, MachineInstr *MI,
149 unsigned &SpotIndex) {
150 MachineBasicBlock::iterator MII = MI;
151 if (++MII != MBB->end()) {
152 unsigned Index = LIs->findGapBeforeInstr(LIs->getInstructionIndex(MII));
153 if (Index) {
154 SpotIndex = Index;
155 return MII;
156 }
157 }
158 return MBB->end();
159}
160
161/// findSpillPoint - Find a gap as far away from the given MI that's suitable
162/// for spilling the current live interval. The index must be before any
163/// defs and uses of the live interval register in the mbb. Return begin() if
164/// none is found.
165MachineBasicBlock::iterator
166PreAllocSplitting::findSpillPoint(MachineBasicBlock *MBB, MachineInstr *MI,
167 SmallPtrSet<MachineInstr*, 4> &RefsInMBB,
168 unsigned &SpillIndex) {
169 MachineBasicBlock::iterator Pt = MBB->begin();
170
171 // Go top down if RefsInMBB is empty.
172 if (RefsInMBB.empty()) {
173 MachineBasicBlock::iterator MII = MBB->begin();
174 MachineBasicBlock::iterator EndPt = MI;
175 do {
176 ++MII;
177 unsigned Index = LIs->getInstructionIndex(MII);
178 unsigned Gap = LIs->findGapBeforeInstr(Index);
179 if (Gap) {
180 Pt = MII;
181 SpillIndex = Gap;
182 break;
183 }
184 } while (MII != EndPt);
185 } else {
186 MachineBasicBlock::iterator MII = MI;
187 while (MII != MBB->begin() && !RefsInMBB.count(MII)) {
188 unsigned Index = LIs->getInstructionIndex(MII);
189 if (LIs->hasGapBeforeInstr(Index)) {
190 Pt = MII;
191 SpillIndex = LIs->findGapBeforeInstr(Index, true);
192 }
193 --MII;
194 }
195 }
196
197 return Pt;
198}
199
200/// findRestorePoint - Find a gap in the instruction index map that's suitable
201/// for restoring the current live interval value. The index must be before any
202/// uses of the live interval register in the mbb. Return end() if none is
203/// found.
204MachineBasicBlock::iterator
205PreAllocSplitting::findRestorePoint(MachineBasicBlock *MBB, MachineInstr *MI,
206 SmallPtrSet<MachineInstr*, 4> &RefsInMBB,
207 unsigned &RestoreIndex) {
208 MachineBasicBlock::iterator Pt = MBB->end();
209
210 // Go bottom up if RefsInMBB is empty.
211 if (RefsInMBB.empty()) {
212 MachineBasicBlock::iterator MII = MBB->end();
213 MachineBasicBlock::iterator EndPt = MI;
214 do {
215 --MII;
216 unsigned Index = LIs->getInstructionIndex(MII);
217 unsigned Gap = LIs->hasGapBeforeInstr(Index);
218 if (Gap) {
219 Pt = MII;
220 RestoreIndex = Gap;
221 break;
222 }
223 } while (MII != EndPt);
224 } else {
225 MachineBasicBlock::iterator MII = MI;
226 MII = ++MII;
227 while (MII != MBB->end()) {
228 unsigned Index = LIs->getInstructionIndex(MII);
229 unsigned Gap = LIs->findGapBeforeInstr(Index);
230 if (Gap) {
231 Pt = MII;
232 RestoreIndex = Gap;
233 }
234 if (RefsInMBB.count(MII))
235 break;
236 ++MII;
237 }
238 }
239
240 return Pt;
241}
242
243/// RecordSplit - Given a register live interval is split, remember the spill
244/// slot where the val#s are in.
245void PreAllocSplitting::RecordSplit(unsigned Reg, unsigned SpillIndex,
246 unsigned RestoreIndex, int SS) {
Evan Cheng06587492008-10-24 02:05:00 +0000247 const LiveRange *LR = NULL;
248 if (SpillIndex) {
249 LR = CurrLI->getLiveRangeContaining(LIs->getUseIndex(SpillIndex));
250 LIValNoSSMap.insert(std::make_pair(std::make_pair(CurrLI->reg,
251 LR->valno->id), SS));
252 }
253 LR = CurrLI->getLiveRangeContaining(LIs->getDefIndex(RestoreIndex));
254 LIValNoSSMap.insert(std::make_pair(std::make_pair(CurrLI->reg,
255 LR->valno->id), SS));
Evan Chengf5cd4f02008-10-23 20:43:13 +0000256}
257
258/// isAlreadySplit - Return if a given val# of a register live interval is already
259/// split. Also return by reference the spill stock where the value is.
260bool PreAllocSplitting::isAlreadySplit(unsigned Reg, unsigned ValNoId, int &SS){
261 std::map<std::pair<unsigned, unsigned>, int>::iterator I =
262 LIValNoSSMap.find(std::make_pair(Reg, ValNoId));
263 if (I == LIValNoSSMap.end())
264 return false;
265 SS = I->second;
266 return true;
267}
268
269/// UpdateIntervalForSplit - Given the specified val# of the current live
270/// interval is being split, and the split and rejoin indices, update the live
271/// interval accordingly.
272void
273PreAllocSplitting::UpdateIntervalForSplit(VNInfo *ValNo, unsigned SplitIndex,
274 unsigned JoinIndex) {
275 SmallVector<std::pair<unsigned,unsigned>, 4> Before;
276 SmallVector<std::pair<unsigned,unsigned>, 4> After;
277 SmallVector<unsigned, 4> BeforeKills;
278 SmallVector<unsigned, 4> AfterKills;
279 SmallPtrSet<const LiveRange*, 4> Processed;
280
281 // First, let's figure out which parts of the live interval is now defined
282 // by the restore, which are defined by the original definition.
283 const LiveRange *LR = CurrLI->getLiveRangeContaining(JoinIndex);
284 After.push_back(std::make_pair(JoinIndex, LR->end));
Evan Cheng06587492008-10-24 02:05:00 +0000285 if (CurrLI->isKill(ValNo, LR->end))
286 AfterKills.push_back(LR->end);
287
Evan Chengf5cd4f02008-10-23 20:43:13 +0000288 assert(LR->contains(SplitIndex));
Evan Cheng06587492008-10-24 02:05:00 +0000289 if (SplitIndex > LR->start) {
290 Before.push_back(std::make_pair(LR->start, SplitIndex));
291 BeforeKills.push_back(SplitIndex);
292 }
Evan Chengf5cd4f02008-10-23 20:43:13 +0000293 Processed.insert(LR);
294
295 SmallVector<MachineBasicBlock*, 4> WorkList;
296 MachineBasicBlock *MBB = LIs->getMBBFromIndex(LR->end-1);
297 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
298 SE = MBB->succ_end(); SI != SE; ++SI)
299 WorkList.push_back(*SI);
300
301 while (!WorkList.empty()) {
302 MBB = WorkList.back();
303 WorkList.pop_back();
304 unsigned Idx = LIs->getMBBStartIdx(MBB);
305 LR = CurrLI->getLiveRangeContaining(Idx);
306 if (LR && LR->valno == ValNo && !Processed.count(LR)) {
307 After.push_back(std::make_pair(LR->start, LR->end));
308 if (CurrLI->isKill(ValNo, LR->end))
309 AfterKills.push_back(LR->end);
310 Idx = LIs->getMBBEndIdx(MBB);
311 if (LR->end > Idx) {
312 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
313 SE = MBB->succ_end(); SI != SE; ++SI)
314 WorkList.push_back(*SI);
315 if (LR->end > Idx+1) {
316 MBB = LIs->getMBBFromIndex(LR->end-1);
317 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
318 SE = MBB->succ_end(); SI != SE; ++SI)
319 WorkList.push_back(*SI);
320 }
321 }
322 Processed.insert(LR);
323 }
324 }
325
326 for (LiveInterval::iterator I = CurrLI->begin(), E = CurrLI->end();
327 I != E; ++I) {
328 LiveRange *LR = I;
329 if (LR->valno == ValNo && !Processed.count(LR)) {
330 Before.push_back(std::make_pair(LR->start, LR->end));
331 if (CurrLI->isKill(ValNo, LR->end))
332 BeforeKills.push_back(LR->end);
333 }
334 }
335
336 // Now create new val#s to represent the live ranges defined by the old def
337 // those defined by the restore.
338 unsigned AfterDef = ValNo->def;
339 MachineInstr *AfterCopy = ValNo->copy;
340 bool HasPHIKill = ValNo->hasPHIKill;
341 CurrLI->removeValNo(ValNo);
Evan Cheng06587492008-10-24 02:05:00 +0000342 VNInfo *BValNo = (Before.empty())
343 ? NULL
344 : CurrLI->getNextValue(AfterDef, AfterCopy, LIs->getVNInfoAllocator());
345 if (BValNo)
346 CurrLI->addKills(BValNo, BeforeKills);
347
348 VNInfo *AValNo = (After.empty())
349 ? NULL
350 : CurrLI->getNextValue(JoinIndex,0, LIs->getVNInfoAllocator());
351 if (AValNo) {
352 AValNo->hasPHIKill = HasPHIKill;
353 CurrLI->addKills(AValNo, AfterKills);
354 }
Evan Chengf5cd4f02008-10-23 20:43:13 +0000355
356 for (unsigned i = 0, e = Before.size(); i != e; ++i) {
357 unsigned Start = Before[i].first;
358 unsigned End = Before[i].second;
359 CurrLI->addRange(LiveRange(Start, End, BValNo));
360 }
361 for (unsigned i = 0, e = After.size(); i != e; ++i) {
362 unsigned Start = After[i].first;
363 unsigned End = After[i].second;
364 CurrLI->addRange(LiveRange(Start, End, AValNo));
365 }
366}
367
368/// ShrinkWrapToLastUse - There are uses of the current live interval in the
369/// given block, shrink wrap the live interval to the last use (i.e. remove
370/// from last use to the end of the mbb). In case mbb is the where the barrier
371/// is, remove from the last use to the barrier.
372bool
373PreAllocSplitting::ShrinkWrapToLastUse(MachineBasicBlock *MBB,
Evan Cheng06587492008-10-24 02:05:00 +0000374 SmallVector<MachineOperand*, 4> &Uses,
375 SmallPtrSet<MachineInstr*, 4> &UseMIs) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000376 MachineOperand *LastMO = 0;
377 MachineInstr *LastMI = 0;
378 if (MBB != BarrierMBB && Uses.size() == 1) {
379 // Single use, no need to traverse the block. We can't assume this for the
380 // barrier bb though since the use is probably below the barrier.
381 LastMO = Uses[0];
382 LastMI = LastMO->getParent();
383 } else {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000384 MachineBasicBlock::iterator MII;
385 if (MBB == BarrierMBB) {
386 MII = Barrier;
387 --MII;
388 } else
389 MII = MBB->end();
390 for (MachineBasicBlock::iterator MEE = MBB->begin(); MII != MEE; --MII) {
391 MachineInstr *UseMI = &*MII;
392 if (!UseMIs.count(UseMI))
393 continue;
394 for (unsigned i = 0, e = UseMI->getNumOperands(); i != e; ++i) {
395 MachineOperand &MO = UseMI->getOperand(i);
396 if (MO.isReg() && MO.getReg() == CurrLI->reg) {
397 LastMO = &MO;
398 break;
399 }
400 }
401 LastMI = UseMI;
402 break;
403 }
404 }
405
406 // Cut off live range from last use (or beginning of the mbb if there
407 // are no uses in it) to the end of the mbb.
408 unsigned RangeStart, RangeEnd = LIs->getMBBEndIdx(MBB)+1;
409 if (LastMI) {
410 RangeStart = LIs->getUseIndex(LIs->getInstructionIndex(LastMI))+1;
411 assert(!LastMO->isKill() && "Last use already terminates the interval?");
412 LastMO->setIsKill();
413 } else {
414 assert(MBB == BarrierMBB);
415 RangeStart = LIs->getMBBStartIdx(MBB);
416 }
417 if (MBB == BarrierMBB)
Evan Cheng06587492008-10-24 02:05:00 +0000418 RangeEnd = LIs->getUseIndex(BarrierIdx)+1;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000419 CurrLI->removeRange(RangeStart, RangeEnd);
420
421 // Return true if the last use becomes a new kill.
422 return LastMI;
423}
424
425/// ShrinkWrapLiveInterval - Recursively traverse the predecessor
426/// chain to find the new 'kills' and shrink wrap the live interval to the
427/// new kill indices.
428void
429PreAllocSplitting::ShrinkWrapLiveInterval(VNInfo *ValNo,
Evan Cheng06587492008-10-24 02:05:00 +0000430 MachineBasicBlock *MBB, MachineBasicBlock *DefMBB,
431 SmallPtrSet<MachineBasicBlock*, 8> &Visited,
432 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > &Uses,
433 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > &UseMIs,
434 SmallVector<MachineBasicBlock*, 4> &UseMBBs) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000435 if (!Visited.insert(MBB))
436 return;
437
Evan Cheng06587492008-10-24 02:05:00 +0000438 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator
439 UMII = Uses.find(MBB);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000440 if (UMII != Uses.end()) {
441 // At least one use in this mbb, lets look for the kill.
Evan Cheng06587492008-10-24 02:05:00 +0000442 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator
443 UMII2 = UseMIs.find(MBB);
444 if (ShrinkWrapToLastUse(MBB, UMII->second, UMII2->second))
Evan Chengf5cd4f02008-10-23 20:43:13 +0000445 // Found a kill, shrink wrapping of this path ends here.
446 return;
Evan Cheng06587492008-10-24 02:05:00 +0000447 } else if (MBB == DefMBB) {
448 assert(LIValNoSSMap.find(std::make_pair(CurrLI->reg, ValNo->id)) !=
449 LIValNoSSMap.end() && "Why wasn't def spilled?");
450 // There are no uses after the def.
451 MachineInstr *DefMI = LIs->getInstructionFromIndex(ValNo->def);
452 assert(RestoreMIs.count(DefMI) && "Not defined by a join?");
453 if (UseMBBs.empty()) {
454 // The only use must be below barrier in the barrier block. It's safe to
455 // remove the def.
456 LIs->RemoveMachineInstrFromMaps(DefMI);
457 DefMI->eraseFromParent();
458 CurrLI->removeRange(ValNo->def, LIs->getMBBEndIdx(MBB)+1);
459 }
Evan Chengf5cd4f02008-10-23 20:43:13 +0000460 } else {
461 // Remove entire live range of the bb out of the live interval.
Evan Cheng06587492008-10-24 02:05:00 +0000462 CurrLI->removeRange(LIs->getMBBStartIdx(MBB), LIs->getMBBEndIdx(MBB)+1);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000463 abort(); // FIXME
464 }
465
466 if (MBB == DefMBB)
467 // Reached the def mbb, stop traversing this path further.
468 return;
469
470 // Traverse the pathes up the predecessor chains further.
471 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
472 PE = MBB->pred_end(); PI != PE; ++PI) {
473 MachineBasicBlock *Pred = *PI;
474 if (Pred == MBB)
475 continue;
476 if (Pred == DefMBB && ValNo->hasPHIKill)
477 // Pred is the def bb and the def reaches other val#s, we must
478 // allow the value to be live out of the bb.
479 continue;
Evan Cheng06587492008-10-24 02:05:00 +0000480 ShrinkWrapLiveInterval(ValNo, Pred, DefMBB, Visited, Uses, UseMIs, UseMBBs);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000481 }
482
483 return;
484}
485
486/// SplitRegLiveInterval - Split (spill and restore) the given live interval
487/// so it would not cross the barrier that's being processed. Shrink wrap
488/// (minimize) the live interval to the last uses.
489bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) {
490 CurrLI = LI;
491
492 // Find live range where current interval cross the barrier.
493 LiveInterval::iterator LR =
494 CurrLI->FindLiveRangeContaining(LIs->getUseIndex(BarrierIdx));
495 VNInfo *ValNo = LR->valno;
496
497 if (ValNo->def == ~1U) {
498 // Defined by a dead def? How can this be?
499 assert(0 && "Val# is defined by a dead def?");
500 abort();
501 }
502
Evan Cheng06587492008-10-24 02:05:00 +0000503 // FIXME: For now, if definition is rematerializable, do not split.
504 MachineInstr *DefMI = (ValNo->def != ~0U)
505 ? LIs->getInstructionFromIndex(ValNo->def) : NULL;
506 if (DefMI && LIs->isReMaterializable(*LI, ValNo, DefMI))
507 return false;
508
Evan Chengf5cd4f02008-10-23 20:43:13 +0000509 // Find all references in the barrier mbb.
510 SmallPtrSet<MachineInstr*, 4> RefsInMBB;
511 for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(CurrLI->reg),
512 E = MRI->reg_end(); I != E; ++I) {
513 MachineInstr *RefMI = &*I;
514 if (RefMI->getParent() == BarrierMBB)
515 RefsInMBB.insert(RefMI);
516 }
517
518 // Find a point to restore the value after the barrier.
519 unsigned RestoreIndex;
520 MachineBasicBlock::iterator RestorePt =
521 findRestorePoint(BarrierMBB, Barrier, RefsInMBB, RestoreIndex);
522 if (RestorePt == BarrierMBB->end())
523 return false;
524
525 // Add a spill either before the barrier or after the definition.
Evan Cheng06587492008-10-24 02:05:00 +0000526 MachineBasicBlock *DefMBB = DefMI ? DefMI->getParent() : NULL;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000527 const TargetRegisterClass *RC = MRI->getRegClass(CurrLI->reg);
528 int SS;
529 unsigned SpillIndex = 0;
Evan Cheng06587492008-10-24 02:05:00 +0000530 MachineInstr *SpillMI = NULL;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000531 if (isAlreadySplit(CurrLI->reg, ValNo->id, SS)) {
532 // If it's already split, just restore the value. There is no need to spill
533 // the def again.
Evan Chengf5cd4f02008-10-23 20:43:13 +0000534 } else if (ValNo->def == ~0U) {
535 // If it's defined by a phi, we must split just before the barrier.
536 MachineBasicBlock::iterator SpillPt =
537 findSpillPoint(BarrierMBB, Barrier, RefsInMBB, SpillIndex);
538 if (SpillPt == BarrierMBB->begin())
539 return false; // No gap to insert spill.
540 // Add spill.
541 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
542 TII->storeRegToStackSlot(*BarrierMBB, SpillPt, CurrLI->reg, true, SS, RC);
Evan Cheng06587492008-10-24 02:05:00 +0000543 SpillMI = prior(SpillPt);
544 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000545 } else {
546 // Check if it's possible to insert a spill after the def MI.
Evan Chengf5cd4f02008-10-23 20:43:13 +0000547 MachineBasicBlock::iterator SpillPt =
548 findNextEmptySlot(DefMBB, DefMI, SpillIndex);
549 if (SpillPt == DefMBB->end())
550 return false; // No gap to insert spill.
551 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
552
Evan Cheng06587492008-10-24 02:05:00 +0000553 // Add spill. The store instruction kills the register if def is before the
554 // barrier in the barrier block.
555 TII->storeRegToStackSlot(*DefMBB, SpillPt, CurrLI->reg,
556 DefMBB == BarrierMBB, SS, RC);
557 SpillMI = prior(SpillPt);
558 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000559 }
560
561 // Add restore.
562 // FIXME: Create live interval for stack slot.
563 TII->loadRegFromStackSlot(*BarrierMBB, RestorePt, CurrLI->reg, SS, RC);
564 MachineInstr *LoadMI = prior(RestorePt);
565 LIs->InsertMachineInstrInMaps(LoadMI, RestoreIndex);
Evan Cheng06587492008-10-24 02:05:00 +0000566 RestoreMIs.insert(LoadMI);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000567
568 // If live interval is spilled in the same block as the barrier, just
569 // create a hole in the interval.
570 if (!DefMBB ||
Evan Cheng06587492008-10-24 02:05:00 +0000571 (SpillIndex && SpillMI->getParent() == BarrierMBB)) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000572 UpdateIntervalForSplit(ValNo, LIs->getUseIndex(SpillIndex)+1,
573 LIs->getDefIndex(RestoreIndex));
574
575 // Record val# values are in the specific spill slot.
576 RecordSplit(CurrLI->reg, SpillIndex, RestoreIndex, SS);
577
578 ++NumSplit;
579 return true;
580 }
581
582 // Shrink wrap the live interval by walking up the CFG and find the
583 // new kills.
584 // Now let's find all the uses of the val#.
Evan Cheng06587492008-10-24 02:05:00 +0000585 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > Uses;
586 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > UseMIs;
587 SmallPtrSet<MachineBasicBlock*, 4> Seen;
588 SmallVector<MachineBasicBlock*, 4> UseMBBs;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000589 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(CurrLI->reg),
590 UE = MRI->use_end(); UI != UE; ++UI) {
591 MachineOperand &UseMO = UI.getOperand();
592 MachineInstr *UseMI = UseMO.getParent();
593 unsigned UseIdx = LIs->getInstructionIndex(UseMI);
594 LiveInterval::iterator ULR = CurrLI->FindLiveRangeContaining(UseIdx);
595 if (ULR->valno != ValNo)
596 continue;
597 MachineBasicBlock *UseMBB = UseMI->getParent();
Evan Cheng06587492008-10-24 02:05:00 +0000598 // Remember which other mbb's use this val#.
599 if (Seen.insert(UseMBB) && UseMBB != BarrierMBB)
600 UseMBBs.push_back(UseMBB);
601 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator
602 UMII = Uses.find(UseMBB);
603 if (UMII != Uses.end()) {
604 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator
605 UMII2 = UseMIs.find(UseMBB);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000606 UMII->second.push_back(&UseMO);
Evan Cheng06587492008-10-24 02:05:00 +0000607 UMII2->second.insert(UseMI);
608 } else {
609 SmallVector<MachineOperand*, 4> Ops;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000610 Ops.push_back(&UseMO);
Evan Cheng06587492008-10-24 02:05:00 +0000611 Uses.insert(std::make_pair(UseMBB, Ops));
612 SmallPtrSet<MachineInstr*, 4> MIs;
613 MIs.insert(UseMI);
614 UseMIs.insert(std::make_pair(UseMBB, MIs));
Evan Chengf5cd4f02008-10-23 20:43:13 +0000615 }
616 }
617
618 // Walk up the predecessor chains.
619 SmallPtrSet<MachineBasicBlock*, 8> Visited;
Evan Cheng06587492008-10-24 02:05:00 +0000620 ShrinkWrapLiveInterval(ValNo, BarrierMBB, DefMBB, Visited,
621 Uses, UseMIs, UseMBBs);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000622
623 // Remove live range from barrier to the restore. FIXME: Find a better
624 // point to re-start the live interval.
625 UpdateIntervalForSplit(ValNo, LIs->getUseIndex(BarrierIdx)+1,
626 LIs->getDefIndex(RestoreIndex));
627 // Record val# values are in the specific spill slot.
Evan Cheng06587492008-10-24 02:05:00 +0000628 RecordSplit(CurrLI->reg, SpillIndex, RestoreIndex, SS);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000629
630 ++NumSplit;
631 return true;
632}
633
634/// SplitRegLiveIntervals - Split all register live intervals that cross the
635/// barrier that's being processed.
636bool
637PreAllocSplitting::SplitRegLiveIntervals(const TargetRegisterClass **RCs) {
638 // First find all the virtual registers whose live intervals are intercepted
639 // by the current barrier.
640 SmallVector<LiveInterval*, 8> Intervals;
641 for (const TargetRegisterClass **RC = RCs; *RC; ++RC) {
642 std::vector<unsigned> &VRs = MRI->getRegClassVirtRegs(*RC);
643 for (unsigned i = 0, e = VRs.size(); i != e; ++i) {
644 unsigned Reg = VRs[i];
645 if (!LIs->hasInterval(Reg))
646 continue;
647 LiveInterval *LI = &LIs->getInterval(Reg);
648 if (LI->liveAt(BarrierIdx) && !Barrier->readsRegister(Reg))
649 // Virtual register live interval is intercepted by the barrier. We
650 // should split and shrink wrap its interval if possible.
651 Intervals.push_back(LI);
652 }
653 }
654
655 // Process the affected live intervals.
656 bool Change = false;
657 while (!Intervals.empty()) {
658 LiveInterval *LI = Intervals.back();
659 Intervals.pop_back();
660 Change |= SplitRegLiveInterval(LI);
661 }
662
663 return Change;
664}
665
Evan Cheng09e8ca82008-10-20 21:44:59 +0000666bool PreAllocSplitting::runOnMachineFunction(MachineFunction &MF) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000667 CurMF = &MF;
668 TM = &MF.getTarget();
669 TII = TM->getInstrInfo();
670 MFI = MF.getFrameInfo();
671 MRI = &MF.getRegInfo();
672 LIs = &getAnalysis<LiveIntervals>();
673
674 bool MadeChange = false;
675
676 // Make sure blocks are numbered in order.
677 MF.RenumberBlocks();
678
679 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
680 I != E; ++I) {
681 BarrierMBB = &*I;
682 for (MachineBasicBlock::reverse_iterator II = BarrierMBB->rbegin(),
683 EE = BarrierMBB->rend(); II != EE; ++II) {
684 Barrier = &*II;
685 const TargetRegisterClass **BarrierRCs =
686 Barrier->getDesc().getRegClassBarriers();
687 if (!BarrierRCs)
688 continue;
689 BarrierIdx = LIs->getInstructionIndex(Barrier);
690 MadeChange |= SplitRegLiveIntervals(BarrierRCs);
691 }
692 }
693
694 return MadeChange;
Evan Cheng09e8ca82008-10-20 21:44:59 +0000695}