| Andrew Trick | 0726926 | 2012-03-21 22:31:31 +0000 | [diff] [blame^] | 1 | ; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s |
| 2 | ; XFAIL: * |
| 3 | ; ...should pass. See PR12324: misched bringup |
| Andrew Trick | c6a19dd | 2012-03-21 04:12:19 +0000 | [diff] [blame] | 4 | ; |
| 5 | ; Interesting MachineScheduler cases. |
| 6 | |
| 7 | declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind |
| 8 | |
| 9 | ; From oggenc. |
| 10 | ; After coalescing, we have a dead superreg (RAX) definition. |
| Andrew Trick | 0726926 | 2012-03-21 22:31:31 +0000 | [diff] [blame^] | 11 | ; |
| 12 | ; CHECK: xorl %esi, %esi |
| 13 | ; CHECK: movl $32, %ecx |
| 14 | ; CHECK: rep;movsl |
| Andrew Trick | c6a19dd | 2012-03-21 04:12:19 +0000 | [diff] [blame] | 15 | define fastcc void @_preextrapolate_helper() nounwind uwtable ssp { |
| 16 | entry: |
| 17 | br i1 undef, label %for.cond.preheader, label %if.end |
| 18 | |
| 19 | for.cond.preheader: ; preds = %entry |
| 20 | call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* null, i64 128, i32 4, i1 false) nounwind |
| 21 | unreachable |
| 22 | |
| 23 | if.end: ; preds = %entry |
| 24 | ret void |
| 25 | } |