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Wesley Peck4e9141f2010-10-21 03:57:26 +00001//===-- MBlazeMCCodeEmitter.cpp - Convert MBlaze code to machine code -----===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the MBlazeMCCodeEmitter class.
11//
12//===----------------------------------------------------------------------===//
13
Chris Lattner2ac19022010-11-15 05:19:05 +000014#define DEBUG_TYPE "mccodeemitter"
Wesley Peck4e9141f2010-10-21 03:57:26 +000015#include "MBlaze.h"
16#include "MBlazeInstrInfo.h"
Wesley Peck4e9141f2010-10-21 03:57:26 +000017#include "llvm/MC/MCCodeEmitter.h"
18#include "llvm/MC/MCExpr.h"
19#include "llvm/MC/MCInst.h"
20#include "llvm/MC/MCSymbol.h"
21#include "llvm/MC/MCFixup.h"
22#include "llvm/ADT/Statistic.h"
23#include "llvm/Support/raw_ostream.h"
24using namespace llvm;
25
26STATISTIC(MCNumEmitted, "Number of MC instructions emitted");
27
28namespace {
29class MBlazeMCCodeEmitter : public MCCodeEmitter {
30 MBlazeMCCodeEmitter(const MBlazeMCCodeEmitter &); // DO NOT IMPLEMENT
31 void operator=(const MBlazeMCCodeEmitter &); // DO NOT IMPLEMENT
32 const TargetMachine &TM;
33 const TargetInstrInfo &TII;
34 MCContext &Ctx;
35
36public:
37 MBlazeMCCodeEmitter(TargetMachine &tm, MCContext &ctx)
38 : TM(tm), TII(*TM.getInstrInfo()), Ctx(ctx) {
39 }
40
41 ~MBlazeMCCodeEmitter() {}
42
43 // getBinaryCodeForInstr - TableGen'erated function for getting the
44 // binary encoding for an instruction.
45 unsigned getBinaryCodeForInstr(const MCInst &MI) const;
46
47 /// getMachineOpValue - Return binary encoding of operand. If the machine
48 /// operand requires relocation, record the relocation and return zero.
49 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO) const;
50 unsigned getMachineOpValue(const MCInst &MI, unsigned OpIdx) const {
51 return getMachineOpValue(MI, MI.getOperand(OpIdx));
52 }
53
Wesley Peck4e9141f2010-10-21 03:57:26 +000054 static unsigned GetMBlazeRegNum(const MCOperand &MO) {
55 // FIXME: getMBlazeRegisterNumbering() is sufficient?
56 assert(0 && "MBlazeMCCodeEmitter::GetMBlazeRegNum() not yet implemented.");
57 return 0;
58 }
59
60 void EmitByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
61 // The MicroBlaze uses a bit reversed format so we need to reverse the
62 // order of the bits. Taken from:
63 // http://graphics.stanford.edu/~seander/bithacks.html
64 C = ((C * 0x80200802ULL) & 0x0884422110ULL) * 0x0101010101ULL >> 32;
65
66 OS << (char)C;
67 ++CurByte;
68 }
69
70 void EmitRawByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
71 OS << (char)C;
72 ++CurByte;
73 }
74
75 void EmitConstant(uint64_t Val, unsigned Size, unsigned &CurByte,
76 raw_ostream &OS) const {
Wesley Peck0a67d922010-11-08 19:40:01 +000077 assert(Size <= 8 && "size too big in emit constant");
Wesley Peck4e9141f2010-10-21 03:57:26 +000078
79 for (unsigned i = 0; i != Size; ++i) {
80 EmitByte(Val & 255, CurByte, OS);
81 Val >>= 8;
82 }
83 }
84
85 void EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const;
Wesley Peck4b047132010-11-21 22:06:28 +000086 void EmitIMM(const MCInst &MI, unsigned &CurByte, raw_ostream &OS) const;
Wesley Peck4e9141f2010-10-21 03:57:26 +000087
Wesley Peck4b047132010-11-21 22:06:28 +000088 void EmitImmediate(const MCInst &MI, unsigned opNo, bool pcrel,
Wesley Peck4e9141f2010-10-21 03:57:26 +000089 unsigned &CurByte, raw_ostream &OS,
90 SmallVectorImpl<MCFixup> &Fixups) const;
91
92 void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
93 SmallVectorImpl<MCFixup> &Fixups) const;
94};
95
96} // end anonymous namespace
97
98
99MCCodeEmitter *llvm::createMBlazeMCCodeEmitter(const Target &,
100 TargetMachine &TM,
101 MCContext &Ctx) {
102 return new MBlazeMCCodeEmitter(TM, Ctx);
103}
104
105/// getMachineOpValue - Return binary encoding of operand. If the machine
106/// operand requires relocation, record the relocation and return zero.
107unsigned MBlazeMCCodeEmitter::getMachineOpValue(const MCInst &MI,
108 const MCOperand &MO) const {
109 if (MO.isReg())
110 return MBlazeRegisterInfo::getRegisterNumbering(MO.getReg());
111 else if (MO.isImm())
112 return static_cast<unsigned>(MO.getImm());
Wesley Peck0a67d922010-11-08 19:40:01 +0000113 else if (MO.isExpr())
Wesley Peck4e9141f2010-10-21 03:57:26 +0000114 return 0; // The relocation has already been recorded at this point.
115 else {
116#ifndef NDEBUG
117 errs() << MO;
118#endif
119 llvm_unreachable(0);
120 }
121 return 0;
122}
123
124void MBlazeMCCodeEmitter::
125EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const {
126 int32_t val = (int32_t)imm.getImm();
Wesley Peckef5b3902010-11-11 21:40:53 +0000127 if (val > 32767 || val < -32768) {
Wesley Peck4e9141f2010-10-21 03:57:26 +0000128 EmitByte(0x0D, CurByte, OS);
129 EmitByte(0x00, CurByte, OS);
130 EmitRawByte((val >> 24) & 0xFF, CurByte, OS);
131 EmitRawByte((val >> 16) & 0xFF, CurByte, OS);
132 }
133}
134
135void MBlazeMCCodeEmitter::
Wesley Peck4b047132010-11-21 22:06:28 +0000136EmitIMM(const MCInst &MI, unsigned &CurByte,raw_ostream &OS) const {
137 switch (MI.getOpcode()) {
138 default: break;
139
Wesley Pecka7c7b9d2010-12-12 22:02:31 +0000140 case MBlaze::ADDIK32:
Wesley Peck4b047132010-11-21 22:06:28 +0000141 case MBlaze::ORI32:
142 case MBlaze::BRLID32:
143 EmitByte(0x0D, CurByte, OS);
144 EmitByte(0x00, CurByte, OS);
145 EmitRawByte(0, CurByte, OS);
146 EmitRawByte(0, CurByte, OS);
147 }
Wesley Pecka0603832010-10-27 00:23:01 +0000148}
149
150void MBlazeMCCodeEmitter::
Wesley Peck4b047132010-11-21 22:06:28 +0000151EmitImmediate(const MCInst &MI, unsigned opNo, bool pcrel, unsigned &CurByte,
152 raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups) const {
Wesley Peck0a67d922010-11-08 19:40:01 +0000153 assert(MI.getNumOperands()>opNo && "Not enought operands for instruction");
Wesley Peck4e9141f2010-10-21 03:57:26 +0000154
155 MCOperand oper = MI.getOperand(opNo);
Wesley Peck4b047132010-11-21 22:06:28 +0000156
Wesley Peck4e9141f2010-10-21 03:57:26 +0000157 if (oper.isImm()) {
Wesley Peck4b047132010-11-21 22:06:28 +0000158 EmitIMM(oper, CurByte, OS);
Wesley Peck4e9141f2010-10-21 03:57:26 +0000159 } else if (oper.isExpr()) {
Wesley Peck4b047132010-11-21 22:06:28 +0000160 MCFixupKind FixupKind;
161 switch (MI.getOpcode()) {
162 default:
Rafael Espindolae04ed7e2010-11-28 14:17:56 +0000163 FixupKind = pcrel ? FK_PCRel_2 : FK_Data_2;
Wesley Peck4e9141f2010-10-21 03:57:26 +0000164 Fixups.push_back(MCFixup::Create(0,oper.getExpr(),FixupKind));
Wesley Peck4b047132010-11-21 22:06:28 +0000165 break;
166 case MBlaze::ORI32:
Wesley Pecka7c7b9d2010-12-12 22:02:31 +0000167 case MBlaze::ADDIK32:
Wesley Peck4b047132010-11-21 22:06:28 +0000168 case MBlaze::BRLID32:
Rafael Espindolae04ed7e2010-11-28 14:17:56 +0000169 FixupKind = pcrel ? FK_PCRel_4 : FK_Data_4;
Wesley Peck4b047132010-11-21 22:06:28 +0000170 Fixups.push_back(MCFixup::Create(0,oper.getExpr(),FixupKind));
171 break;
172 }
Wesley Peck4e9141f2010-10-21 03:57:26 +0000173 }
174}
175
Wesley Pecka0603832010-10-27 00:23:01 +0000176
177
Wesley Peck4e9141f2010-10-21 03:57:26 +0000178void MBlazeMCCodeEmitter::
179EncodeInstruction(const MCInst &MI, raw_ostream &OS,
180 SmallVectorImpl<MCFixup> &Fixups) const {
181 unsigned Opcode = MI.getOpcode();
182 const TargetInstrDesc &Desc = TII.get(Opcode);
183 uint64_t TSFlags = Desc.TSFlags;
184 // Keep track of the current byte being emitted.
185 unsigned CurByte = 0;
186
Wesley Peck4b047132010-11-21 22:06:28 +0000187 // Emit an IMM instruction if the instruction we are encoding requires it
188 EmitIMM(MI,CurByte,OS);
189
Wesley Peck4e9141f2010-10-21 03:57:26 +0000190 switch ((TSFlags & MBlazeII::FormMask)) {
191 default: break;
Wesley Pecka0603832010-10-27 00:23:01 +0000192 case MBlazeII::FPseudo:
Wesley Peck4e9141f2010-10-21 03:57:26 +0000193 // Pseudo instructions don't get encoded.
194 return;
Wesley Pecka0603832010-10-27 00:23:01 +0000195 case MBlazeII::FRRI:
Wesley Peck4b047132010-11-21 22:06:28 +0000196 EmitImmediate(MI, 2, false, CurByte, OS, Fixups);
Wesley Peck4e9141f2010-10-21 03:57:26 +0000197 break;
Wesley Pecka0603832010-10-27 00:23:01 +0000198 case MBlazeII::FRIR:
Wesley Peck4b047132010-11-21 22:06:28 +0000199 EmitImmediate(MI, 1, false, CurByte, OS, Fixups);
Wesley Peck4e9141f2010-10-21 03:57:26 +0000200 break;
Wesley Pecka0603832010-10-27 00:23:01 +0000201 case MBlazeII::FCRI:
Wesley Peck4b047132010-11-21 22:06:28 +0000202 EmitImmediate(MI, 1, true, CurByte, OS, Fixups);
Wesley Peck4e9141f2010-10-21 03:57:26 +0000203 break;
Wesley Pecka0603832010-10-27 00:23:01 +0000204 case MBlazeII::FRCI:
Wesley Peck4b047132010-11-21 22:06:28 +0000205 EmitImmediate(MI, 1, true, CurByte, OS, Fixups);
Wesley Pecka0603832010-10-27 00:23:01 +0000206 case MBlazeII::FCCI:
Wesley Peck4b047132010-11-21 22:06:28 +0000207 EmitImmediate(MI, 0, true, CurByte, OS, Fixups);
Wesley Peck4e9141f2010-10-21 03:57:26 +0000208 break;
209 }
210
211 ++MCNumEmitted; // Keep track of the # of mi's emitted
212 unsigned Value = getBinaryCodeForInstr(MI);
Wesley Peck4b047132010-11-21 22:06:28 +0000213 EmitConstant(Value, 4, CurByte, OS);
Wesley Peck4e9141f2010-10-21 03:57:26 +0000214}
215
216// FIXME: These #defines shouldn't be necessary. Instead, tblgen should
217// be able to generate code emitter helpers for either variant, like it
218// does for the AsmWriter.
219#define MBlazeCodeEmitter MBlazeMCCodeEmitter
220#define MachineInstr MCInst
221#include "MBlazeGenCodeEmitter.inc"
222#undef MBlazeCodeEmitter
223#undef MachineInstr