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Chris Lattner08084142003-01-13 00:26:36 +00001//===-- TargetInstrInfo.cpp - Target Instruction Information --------------===//
Misha Brukmanf976c852005-04-21 22:55:34 +00002//
John Criswellb576c942003-10-20 19:43:21 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukmanf976c852005-04-21 22:55:34 +00007//
John Criswellb576c942003-10-20 19:43:21 +00008//===----------------------------------------------------------------------===//
Chris Lattner93fa7052002-10-28 23:55:33 +00009//
Chris Lattner167b10c2005-01-19 06:53:34 +000010// This file implements the TargetInstrInfo class.
Chris Lattner93fa7052002-10-28 23:55:33 +000011//
12//===----------------------------------------------------------------------===//
13
Chris Lattner3501fea2003-01-14 22:00:31 +000014#include "llvm/Target/TargetInstrInfo.h"
Evan Cheng5f54ce32010-09-09 18:18:55 +000015#include "llvm/Target/TargetInstrItineraries.h"
Evan Chengd923fc62009-05-05 00:30:09 +000016#include "llvm/Target/TargetRegisterInfo.h"
Evan Chenga0792de2010-10-06 06:27:31 +000017#include "llvm/CodeGen/SelectionDAGNodes.h"
18#include "llvm/MC/MCAsmInfo.h"
Chris Lattnerb6bbfebd2009-08-02 04:58:19 +000019#include "llvm/Support/ErrorHandling.h"
Chris Lattner167b10c2005-01-19 06:53:34 +000020using namespace llvm;
Chris Lattner93fa7052002-10-28 23:55:33 +000021
Chris Lattnerd90183d2009-08-02 05:20:37 +000022//===----------------------------------------------------------------------===//
23// TargetOperandInfo
24//===----------------------------------------------------------------------===//
25
26/// getRegClass - Get the register class for the operand, handling resolution
27/// of "symbolic" pointer register classes etc. If this is not a register
28/// operand, this returns null.
29const TargetRegisterClass *
30TargetOperandInfo::getRegClass(const TargetRegisterInfo *TRI) const {
31 if (isLookupPtrRegClass())
32 return TRI->getPointerRegClass(RegClass);
Dan Gohmana606d952010-06-18 18:13:55 +000033 // Instructions like INSERT_SUBREG do not have fixed register classes.
34 if (RegClass < 0)
35 return 0;
36 // Otherwise just look it up normally.
Chris Lattnerd90183d2009-08-02 05:20:37 +000037 return TRI->getRegClass(RegClass);
38}
39
40//===----------------------------------------------------------------------===//
41// TargetInstrInfo
42//===----------------------------------------------------------------------===//
43
Chris Lattner749c6f62008-01-07 07:27:27 +000044TargetInstrInfo::TargetInstrInfo(const TargetInstrDesc* Desc,
Misha Brukman7847fca2005-04-22 17:54:37 +000045 unsigned numOpcodes)
Chris Lattner749c6f62008-01-07 07:27:27 +000046 : Descriptors(Desc), NumOpcodes(numOpcodes) {
Chris Lattner93fa7052002-10-28 23:55:33 +000047}
48
Chris Lattner08084142003-01-13 00:26:36 +000049TargetInstrInfo::~TargetInstrInfo() {
Chris Lattner93fa7052002-10-28 23:55:33 +000050}
51
Evan Cheng5f54ce32010-09-09 18:18:55 +000052unsigned
Evan Cheng8239daf2010-11-03 00:45:17 +000053TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,
54 const MachineInstr *MI) const {
Evan Cheng3ef1c872010-09-10 01:29:16 +000055 if (!ItinData || ItinData->isEmpty())
Evan Cheng5f54ce32010-09-09 18:18:55 +000056 return 1;
57
58 unsigned Class = MI->getDesc().getSchedClass();
Bob Wilson064312d2010-09-15 16:28:21 +000059 unsigned UOps = ItinData->Itineraries[Class].NumMicroOps;
Evan Cheng5f54ce32010-09-09 18:18:55 +000060 if (UOps)
61 return UOps;
62
63 // The # of u-ops is dynamically determined. The specific target should
64 // override this function to return the right number.
65 return 1;
66}
67
Evan Chenga0792de2010-10-06 06:27:31 +000068int
69TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
70 const MachineInstr *DefMI, unsigned DefIdx,
71 const MachineInstr *UseMI, unsigned UseIdx) const {
72 if (!ItinData || ItinData->isEmpty())
73 return -1;
74
75 unsigned DefClass = DefMI->getDesc().getSchedClass();
76 unsigned UseClass = UseMI->getDesc().getSchedClass();
77 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
78}
79
80int
81TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
82 SDNode *DefNode, unsigned DefIdx,
83 SDNode *UseNode, unsigned UseIdx) const {
84 if (!ItinData || ItinData->isEmpty())
85 return -1;
86
87 if (!DefNode->isMachineOpcode())
88 return -1;
89
90 unsigned DefClass = get(DefNode->getMachineOpcode()).getSchedClass();
91 if (!UseNode->isMachineOpcode())
92 return ItinData->getOperandCycle(DefClass, DefIdx);
93 unsigned UseClass = get(UseNode->getMachineOpcode()).getSchedClass();
94 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
95}
96
Evan Cheng8239daf2010-11-03 00:45:17 +000097int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
98 const MachineInstr *MI,
99 unsigned *PredCost) const {
100 if (!ItinData || ItinData->isEmpty())
101 return 1;
102
103 return ItinData->getStageLatency(MI->getDesc().getSchedClass());
104}
105
106int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
107 SDNode *N) const {
108 if (!ItinData || ItinData->isEmpty())
109 return 1;
110
111 if (!N->isMachineOpcode())
112 return 1;
113
114 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass());
115}
116
Evan Chengc8141df2010-10-26 02:08:50 +0000117bool TargetInstrInfo::hasLowDefLatency(const InstrItineraryData *ItinData,
118 const MachineInstr *DefMI,
119 unsigned DefIdx) const {
120 if (!ItinData || ItinData->isEmpty())
121 return false;
122
123 unsigned DefClass = DefMI->getDesc().getSchedClass();
124 int DefCycle = ItinData->getOperandCycle(DefClass, DefIdx);
125 return (DefCycle != -1 && DefCycle <= 1);
126}
Evan Chenga0792de2010-10-06 06:27:31 +0000127
Chris Lattnerb6bbfebd2009-08-02 04:58:19 +0000128/// insertNoop - Insert a noop into the instruction stream at the specified
129/// point.
130void TargetInstrInfo::insertNoop(MachineBasicBlock &MBB,
131 MachineBasicBlock::iterator MI) const {
132 llvm_unreachable("Target didn't implement insertNoop!");
133}
134
135
Evan Chengbfd2ec42007-06-08 21:59:56 +0000136bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
Chris Lattner749c6f62008-01-07 07:27:27 +0000137 const TargetInstrDesc &TID = MI->getDesc();
138 if (!TID.isTerminator()) return false;
Chris Lattner69244302008-01-07 01:56:04 +0000139
140 // Conditional branch is a special case.
Chris Lattner749c6f62008-01-07 07:27:27 +0000141 if (TID.isBranch() && !TID.isBarrier())
Chris Lattner69244302008-01-07 01:56:04 +0000142 return true;
Chris Lattner749c6f62008-01-07 07:27:27 +0000143 if (!TID.isPredicable())
Chris Lattner69244302008-01-07 01:56:04 +0000144 return true;
145 return !isPredicated(MI);
Evan Chengbfd2ec42007-06-08 21:59:56 +0000146}
Evan Chengd923fc62009-05-05 00:30:09 +0000147
Chris Lattnercb778a82009-07-29 21:10:12 +0000148
Chris Lattnerd90183d2009-08-02 05:20:37 +0000149/// Measure the specified inline asm to determine an approximation of its
150/// length.
151/// Comments (which run till the next SeparatorChar or newline) do not
152/// count as an instruction.
153/// Any other non-whitespace text is considered an instruction, with
154/// multiple instructions separated by SeparatorChar or newlines.
155/// Variable-length instructions are not handled here; this function
156/// may be overloaded in the target code to do that.
157unsigned TargetInstrInfo::getInlineAsmLength(const char *Str,
Chris Lattner33adcfb2009-08-22 21:43:10 +0000158 const MCAsmInfo &MAI) const {
Chris Lattnerd90183d2009-08-02 05:20:37 +0000159
160
161 // Count the number of instructions in the asm.
162 bool atInsnStart = true;
163 unsigned Length = 0;
164 for (; *Str; ++Str) {
Chris Lattner33adcfb2009-08-22 21:43:10 +0000165 if (*Str == '\n' || *Str == MAI.getSeparatorChar())
Chris Lattnerd90183d2009-08-02 05:20:37 +0000166 atInsnStart = true;
167 if (atInsnStart && !isspace(*Str)) {
Chris Lattner33adcfb2009-08-22 21:43:10 +0000168 Length += MAI.getMaxInstLength();
Chris Lattnerd90183d2009-08-02 05:20:37 +0000169 atInsnStart = false;
170 }
Chris Lattner33adcfb2009-08-22 21:43:10 +0000171 if (atInsnStart && strncmp(Str, MAI.getCommentString(),
172 strlen(MAI.getCommentString())) == 0)
Chris Lattnerd90183d2009-08-02 05:20:37 +0000173 atInsnStart = false;
174 }
175
176 return Length;
177}