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Dan Gohmanf17a25c2007-07-18 16:29:46 +00001//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner081ce942007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Dan Gohmanf17a25c2007-07-18 16:29:46 +00007//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPC.h"
15#include "PPCTargetAsmInfo.h"
16#include "PPCTargetMachine.h"
17#include "llvm/Module.h"
18#include "llvm/PassManager.h"
19#include "llvm/Target/TargetMachineRegistry.h"
Dale Johannesen493492f2008-07-31 18:13:12 +000020#include "llvm/Target/TargetOptions.h"
Dan Gohmanf17a25c2007-07-18 16:29:46 +000021using namespace llvm;
22
Dan Gohman089efff2008-05-13 00:00:25 +000023// Register the targets
24static RegisterTarget<PPC32TargetMachine>
25X("ppc32", " PowerPC 32");
26static RegisterTarget<PPC64TargetMachine>
27Y("ppc64", " PowerPC 64");
Dan Gohmanf17a25c2007-07-18 16:29:46 +000028
Anton Korobeynikov01c0e9f2008-08-17 13:54:28 +000029// No assembler printer by default
30PPCTargetMachine::AsmPrinterCtorFn PPCTargetMachine::AsmPrinterCtor = 0;
31
Dan Gohmanf17a25c2007-07-18 16:29:46 +000032const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
33 if (Subtarget.isDarwin())
Anton Korobeynikovd15bc312008-07-19 21:44:57 +000034 return new PPCDarwinTargetAsmInfo(*this);
Dan Gohmanf17a25c2007-07-18 16:29:46 +000035 else
Anton Korobeynikovd15bc312008-07-19 21:44:57 +000036 return new PPCLinuxTargetAsmInfo(*this);
Dan Gohmanf17a25c2007-07-18 16:29:46 +000037}
38
39unsigned PPC32TargetMachine::getJITMatchQuality() {
40#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
41 if (sizeof(void*) == 4)
42 return 10;
43#endif
44 return 0;
45}
46unsigned PPC64TargetMachine::getJITMatchQuality() {
47#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
48 if (sizeof(void*) == 8)
49 return 10;
50#endif
51 return 0;
52}
53
54unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
55 // We strongly match "powerpc-*".
56 std::string TT = M.getTargetTriple();
57 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
58 return 20;
59
60 // If the target triple is something non-powerpc, we don't match.
61 if (!TT.empty()) return 0;
62
63 if (M.getEndianness() == Module::BigEndian &&
64 M.getPointerSize() == Module::Pointer32)
65 return 10; // Weak match
66 else if (M.getEndianness() != Module::AnyEndianness ||
67 M.getPointerSize() != Module::AnyPointerSize)
68 return 0; // Match for some other target
69
70 return getJITMatchQuality()/2;
71}
72
73unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
74 // We strongly match "powerpc64-*".
75 std::string TT = M.getTargetTriple();
76 if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
77 return 20;
78
79 if (M.getEndianness() == Module::BigEndian &&
80 M.getPointerSize() == Module::Pointer64)
81 return 10; // Weak match
82 else if (M.getEndianness() != Module::AnyEndianness ||
83 M.getPointerSize() != Module::AnyPointerSize)
84 return 0; // Match for some other target
85
86 return getJITMatchQuality()/2;
87}
88
89
90PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
91 bool is64Bit)
92 : Subtarget(*this, M, FS, is64Bit),
93 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
94 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
95 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
96
Anton Korobeynikov8c90d2a2008-02-20 11:22:39 +000097 if (getRelocationModel() == Reloc::Default) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +000098 if (Subtarget.isDarwin())
99 setRelocationModel(Reloc::DynamicNoPIC);
100 else
101 setRelocationModel(Reloc::Static);
Anton Korobeynikov8c90d2a2008-02-20 11:22:39 +0000102 }
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000103}
104
105/// Override this for PowerPC. Tail merging happily breaks up instruction issue
106/// groups, which typically degrades performance.
Dan Gohman62ea18a2007-11-19 20:46:23 +0000107bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000108
109PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
110 : PPCTargetMachine(M, FS, false) {
111}
112
113
114PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
115 : PPCTargetMachine(M, FS, true) {
116}
117
118
119//===----------------------------------------------------------------------===//
120// Pass Pipeline Configuration
121//===----------------------------------------------------------------------===//
122
Dan Gohmane34aa772008-03-11 22:29:46 +0000123bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000124 // Install an instruction selector.
125 PM.add(createPPCISelDag(*this));
126 return false;
127}
128
Dan Gohmane34aa772008-03-11 22:29:46 +0000129bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000130
131 // Must run branch selection immediately preceding the asm printer.
132 PM.add(createPPCBranchSelectionPass());
133 return false;
134}
135
Dan Gohmane34aa772008-03-11 22:29:46 +0000136bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000137 std::ostream &Out) {
Anton Korobeynikov01c0e9f2008-08-17 13:54:28 +0000138 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
139 if (AsmPrinterCtor)
140 PM.add(AsmPrinterCtor(Out, *this));
141
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000142 return false;
143}
144
Dan Gohmane34aa772008-03-11 22:29:46 +0000145bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
Evan Cheng77547212007-07-20 21:56:13 +0000146 bool DumpAsm, MachineCodeEmitter &MCE) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000147 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
148 // FIXME: This should be moved to TargetJITInfo!!
149 if (Subtarget.isPPC64()) {
150 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
151 // instructions to materialize arbitrary global variable + function +
152 // constant pool addresses.
153 setRelocationModel(Reloc::PIC_);
Dale Johannesen493492f2008-07-31 18:13:12 +0000154 // Temporary workaround for the inability of PPC64 JIT to handle jump
155 // tables.
156 DisableJumpTables = true;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000157 } else {
158 setRelocationModel(Reloc::Static);
159 }
160
161 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
162 // writing?
163 Subtarget.SetJITMode();
164
165 // Machine code emitter pass for PowerPC.
166 PM.add(createPPCCodeEmitterPass(*this, MCE));
Anton Korobeynikov01c0e9f2008-08-17 13:54:28 +0000167 if (DumpAsm) {
168 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
169 if (AsmPrinterCtor)
170 PM.add(AsmPrinterCtor(*cerr.stream(), *this));
171 }
172
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000173 return false;
174}
175
Dan Gohmane34aa772008-03-11 22:29:46 +0000176bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
Evan Cheng77547212007-07-20 21:56:13 +0000177 bool DumpAsm, MachineCodeEmitter &MCE) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000178 // Machine code emitter pass for PowerPC.
179 PM.add(createPPCCodeEmitterPass(*this, MCE));
Anton Korobeynikov01c0e9f2008-08-17 13:54:28 +0000180 if (DumpAsm) {
181 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
182 if (AsmPrinterCtor)
183 PM.add(AsmPrinterCtor(*cerr.stream(), *this));
184 }
185
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000186 return false;
187}