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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 0a92af487b8ae5d004a3460e3518a3815d9b36a8 / . / test / CodeGen / CellSPU / eqv.ll
blob: a4d6dbbbd4ee00db1c455a553696c7aeb0dbf91d [file] [log] [blame]
Scott Michel0a92af42007-12-19 20:50:49 +0000[diff] [blame^]1; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
2; RUN: grep eqv %t1.s | count 18 &&
3; RUN: grep xshw %t1.s | count 6 &&
4; RUN: grep xsbh %t1.s | count 3 &&
5; RUN: grep andi %t1.s | count 3
6
7; Test the 'eqv' instruction, whose boolean expression is:
8; (a & b) | (~a & ~b), which simplifies to
9; (a & b) | ~(a | b)
10; Alternatively, a ^ ~b, which the compiler will also match.
11
12; ModuleID = 'eqv.bc'
13
14define <4 x i32> @equiv_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) {
15 %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
16 %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
17 %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
18 %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1]
19 ret <4 x i32> %C
20}
21
22define <4 x i32> @equiv_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) {
23 %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
24 %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
25 %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
26 %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1]
27 ret <4 x i32> %C
28}
29
30define <4 x i32> @equiv_v4i32_3(<4 x i32> %arg1, <4 x i32> %arg2) {
31 %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
32 %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
33 %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
34 %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1]
35 ret <4 x i32> %C
36}
37
38define <4 x i32> @equiv_v4i32_4(<4 x i32> %arg1, <4 x i32> %arg2) {
39 %arg2not = xor <4 x i32> %arg2, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
40 %C = xor <4 x i32> %arg1, %arg2not
41 ret <4 x i32> %C
42}
43
44define i32 @equiv_i32_1(i32 %arg1, i32 %arg2) {
45 %A = and i32 %arg1, %arg2 ; <i32> [#uses=1]
46 %B = or i32 %arg1, %arg2 ; <i32> [#uses=1]
47 %Bnot = xor i32 %B, -1 ; <i32> [#uses=1]
48 %C = or i32 %A, %Bnot ; <i32> [#uses=1]
49 ret i32 %C
50}
51
52define i32 @equiv_i32_2(i32 %arg1, i32 %arg2) {
53 %B = or i32 %arg1, %arg2 ; <i32> [#uses=1]
54 %Bnot = xor i32 %B, -1 ; <i32> [#uses=1]
55 %A = and i32 %arg1, %arg2 ; <i32> [#uses=1]
56 %C = or i32 %A, %Bnot ; <i32> [#uses=1]
57 ret i32 %C
58}
59
60define i32 @equiv_i32_3(i32 %arg1, i32 %arg2) {
61 %B = or i32 %arg1, %arg2 ; <i32> [#uses=1]
62 %A = and i32 %arg1, %arg2 ; <i32> [#uses=1]
63 %Bnot = xor i32 %B, -1 ; <i32> [#uses=1]
64 %C = or i32 %A, %Bnot ; <i32> [#uses=1]
65 ret i32 %C
66}
67
68define i32 @equiv_i32_4(i32 %arg1, i32 %arg2) {
69 %arg2not = xor i32 %arg2, -1
70 %C = xor i32 %arg1, %arg2not
71 ret i32 %C
72}
73
74define i32 @equiv_i32_5(i32 %arg1, i32 %arg2) {
75 %arg1not = xor i32 %arg1, -1
76 %C = xor i32 %arg2, %arg1not
77 ret i32 %C
78}
79
80define i16 @equiv_i16_1(i16 signext %arg1, i16 signext %arg2) signext {
81 %A = and i16 %arg1, %arg2 ; <i16> [#uses=1]
82 %B = or i16 %arg1, %arg2 ; <i16> [#uses=1]
83 %Bnot = xor i16 %B, -1 ; <i16> [#uses=1]
84 %C = or i16 %A, %Bnot ; <i16> [#uses=1]
85 ret i16 %C
86}
87
88define i16 @equiv_i16_2(i16 signext %arg1, i16 signext %arg2) signext {
89 %B = or i16 %arg1, %arg2 ; <i16> [#uses=1]
90 %Bnot = xor i16 %B, -1 ; <i16> [#uses=1]
91 %A = and i16 %arg1, %arg2 ; <i16> [#uses=1]
92 %C = or i16 %A, %Bnot ; <i16> [#uses=1]
93 ret i16 %C
94}
95
96define i16 @equiv_i16_3(i16 signext %arg1, i16 signext %arg2) signext {
97 %B = or i16 %arg1, %arg2 ; <i16> [#uses=1]
98 %A = and i16 %arg1, %arg2 ; <i16> [#uses=1]
99 %Bnot = xor i16 %B, -1 ; <i16> [#uses=1]
100 %C = or i16 %A, %Bnot ; <i16> [#uses=1]
101 ret i16 %C
102}
103
104define i8 @equiv_i8_1(i8 signext %arg1, i8 signext %arg2) signext {
105 %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
106 %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
107 %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
108 %C = or i8 %A, %Bnot ; <i8> [#uses=1]
109 ret i8 %C
110}
111
112define i8 @equiv_i8_2(i8 signext %arg1, i8 signext %arg2) signext {
113 %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
114 %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
115 %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
116 %C = or i8 %A, %Bnot ; <i8> [#uses=1]
117 ret i8 %C
118}
119
120define i8 @equiv_i8_3(i8 signext %arg1, i8 signext %arg2) signext {
121 %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
122 %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
123 %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
124 %C = or i8 %A, %Bnot ; <i8> [#uses=1]
125 ret i8 %C
126}
127
128define i8 @equiv_u8_1(i8 zeroext %arg1, i8 zeroext %arg2) zeroext {
129 %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
130 %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
131 %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
132 %C = or i8 %A, %Bnot ; <i8> [#uses=1]
133 ret i8 %C
134}
135
136define i8 @equiv_u8_2(i8 zeroext %arg1, i8 zeroext %arg2) zeroext {
137 %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
138 %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
139 %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
140 %C = or i8 %A, %Bnot ; <i8> [#uses=1]
141 ret i8 %C
142}
143
144define i8 @equiv_u8_3(i8 zeroext %arg1, i8 zeroext %arg2) zeroext {
145 %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
146 %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
147 %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
148 %C = or i8 %A, %Bnot ; <i8> [#uses=1]
149 ret i8 %C
150}