| Dan Gohman | 11ba3b1 | 2008-07-30 18:09:17 +0000 | [diff] [blame^] | 1 | ; RUN: llvm-as < %s | llc -march=x86 | not grep and |
| 2 | ; RUN: llvm-as < %s | llc -march=x86-64 > %t |
| 3 | ; RUN: not grep and %t |
| 4 | ; RUN: not grep movzbq %t |
| 5 | ; RUN: not grep movzwq %t |
| 6 | ; RUN: not grep movzlq %t |
| 7 | |
| 8 | ; These should use movzbl instead of 'and 255'. |
| 9 | ; This related to not having a ZERO_EXTEND_REG opcode. |
| 10 | |
| 11 | define i32 @c(i32 %d) nounwind { |
| 12 | %e = add i32 %d, 1 |
| 13 | %retval = and i32 %e, 65535 |
| 14 | ret i32 %retval |
| 15 | } |
| 16 | define i64 @e(i64 %d) nounwind { |
| 17 | %e = add i64 %d, 1 |
| 18 | %retval = and i64 %e, 65535 |
| 19 | ret i64 %retval |
| 20 | } |
| 21 | define i64 @f(i64 %d) nounwind { |
| 22 | %e = add i64 %d, 1 |
| 23 | %retval = and i64 %e, 4294967295 |
| 24 | ret i64 %retval |
| 25 | } |
| 26 | |
| 27 | define i32 @g(i8 %d) nounwind { |
| 28 | %e = add i8 %d, 1 |
| 29 | %retval = zext i8 %e to i32 |
| 30 | ret i32 %retval |
| 31 | } |
| 32 | define i32 @h(i16 %d) nounwind { |
| 33 | %e = add i16 %d, 1 |
| 34 | %retval = zext i16 %e to i32 |
| 35 | ret i32 %retval |
| 36 | } |
| 37 | define i64 @i(i8 %d) nounwind { |
| 38 | %e = add i8 %d, 1 |
| 39 | %retval = zext i8 %e to i64 |
| 40 | ret i64 %retval |
| 41 | } |
| 42 | define i64 @j(i16 %d) nounwind { |
| 43 | %e = add i16 %d, 1 |
| 44 | %retval = zext i16 %e to i64 |
| 45 | ret i64 %retval |
| 46 | } |
| 47 | define i64 @k(i32 %d) nounwind { |
| 48 | %e = add i32 %d, 1 |
| 49 | %retval = zext i32 %e to i64 |
| 50 | ret i64 %retval |
| 51 | } |