blob: dd460b2a03619c81459a0aa00946f7c5004797b8 [file] [log] [blame]
Evan Chengafff9412011-12-20 18:26:50 +00001; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
Chad Rosier42536af2011-11-05 20:16:15 +00003
4define i32 @t0(i1 zeroext %a) nounwind {
5 %1 = zext i1 %a to i32
6 ret i32 %1
7}
8
9define i32 @t1(i8 signext %a) nounwind {
10 %1 = sext i8 %a to i32
11 ret i32 %1
12}
13
14define i32 @t2(i8 zeroext %a) nounwind {
15 %1 = zext i8 %a to i32
16 ret i32 %1
17}
18
19define i32 @t3(i16 signext %a) nounwind {
20 %1 = sext i16 %a to i32
21 ret i32 %1
22}
23
24define i32 @t4(i16 zeroext %a) nounwind {
25 %1 = zext i16 %a to i32
26 ret i32 %1
27}
28
29define void @foo(i8 %a, i16 %b) nounwind {
30; ARM: foo
31; THUMB: foo
32;; Materialize i1 1
33; ARM: movw r2, #1
34;; zero-ext
35; ARM: and r2, r2, #1
36; THUMB: and r2, r2, #1
37 %1 = call i32 @t0(i1 zeroext 1)
38; ARM: sxtb r2, r1
39; ARM: mov r0, r2
40; THUMB: sxtb r2, r1
41; THUMB: mov r0, r2
42 %2 = call i32 @t1(i8 signext %a)
43; ARM: uxtb r2, r1
44; ARM: mov r0, r2
45; THUMB: uxtb r2, r1
46; THUMB: mov r0, r2
47 %3 = call i32 @t2(i8 zeroext %a)
48; ARM: sxth r2, r1
49; ARM: mov r0, r2
50; THUMB: sxth r2, r1
51; THUMB: mov r0, r2
52 %4 = call i32 @t3(i16 signext %b)
53; ARM: uxth r2, r1
54; ARM: mov r0, r2
55; THUMB: uxth r2, r1
56; THUMB: mov r0, r2
57 %5 = call i32 @t4(i16 zeroext %b)
58
59;; A few test to check materialization
60;; Note: i1 1 was materialized with t1 call
61; ARM: movw r1, #255
62%6 = call i32 @t2(i8 zeroext 255)
63; ARM: movw r1, #65535
64; THUMB: movw r1, #65535
65%7 = call i32 @t4(i16 zeroext 65535)
66 ret void
67}
Chad Rosier0eff39f2011-11-08 00:03:32 +000068
69define void @foo2() nounwind {
70 %1 = call signext i16 @t5()
71 %2 = call zeroext i16 @t6()
72 %3 = call signext i8 @t7()
73 %4 = call zeroext i8 @t8()
74 %5 = call zeroext i1 @t9()
75 ret void
76}
77
78declare signext i16 @t5();
79declare zeroext i16 @t6();
80declare signext i8 @t7();
81declare zeroext i8 @t8();
82declare zeroext i1 @t9();
Chad Rosierb74c8652011-12-02 20:25:18 +000083
84define i32 @t10(i32 %argc, i8** nocapture %argv) {
85entry:
86; ARM: @t10
87; ARM: movw r0, #0
88; ARM: movw r1, #248
89; ARM: movw r2, #187
90; ARM: movw r3, #28
91; ARM: movw r9, #40
92; ARM: movw r12, #186
93; ARM: uxtb r0, r0
94; ARM: uxtb r1, r1
95; ARM: uxtb r2, r2
96; ARM: uxtb r3, r3
97; ARM: uxtb r9, r9
98; ARM: str r9, [sp]
99; ARM: uxtb r9, r12
100; ARM: str r9, [sp, #4]
101; ARM: bl _bar
102; THUMB: @t10
103; THUMB: movs r0, #0
104; THUMB: movt r0, #0
105; THUMB: movs r1, #248
106; THUMB: movt r1, #0
107; THUMB: movs r2, #187
108; THUMB: movt r2, #0
109; THUMB: movs r3, #28
110; THUMB: movt r3, #0
111; THUMB: movw r9, #40
112; THUMB: movt r9, #0
113; THUMB: movw r12, #186
114; THUMB: movt r12, #0
115; THUMB: uxtb r0, r0
116; THUMB: uxtb r1, r1
117; THUMB: uxtb r2, r2
118; THUMB: uxtb r3, r3
119; THUMB: uxtb.w r9, r9
120; THUMB: str.w r9, [sp]
121; THUMB: uxtb.w r9, r12
122; THUMB: str.w r9, [sp, #4]
123; THUMB: bl _bar
124 %call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70)
125 ret i32 0
126}
127
128declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext)