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Eric Christopher50ab0392012-05-07 03:13:32 +00001; Positive test for inline register constraints
2;
3; RUN: llc -march=mipsel < %s | FileCheck %s
4
5define i32 @main() nounwind {
6entry:
7
8; r with char
9;CHECK: #APP
10;CHECK: addi ${{[0-9]+}},${{[0-9]+}},23
11;CHECK: #NO_APP
12 tail call i8 asm sideeffect "addi $0,$1,$2", "=r,r,n"(i8 27, i8 23) nounwind
13
14; r with short
15;CHECK: #APP
16;CHECK: addi ${{[0-9]+}},${{[0-9]+}},13
17;CHECK: #NO_APP
18 tail call i16 asm sideeffect "addi $0,$1,$2", "=r,r,n"(i16 17, i16 13) nounwind
19
20; r with int
21;CHECK: #APP
22;CHECK: addi ${{[0-9]+}},${{[0-9]+}},3
23;CHECK: #NO_APP
24 tail call i32 asm sideeffect "addi $0,$1,$2", "=r,r,n"(i32 7, i32 3) nounwind
Eric Christopher1d5a3922012-05-07 06:25:10 +000025
26; Now c with 1024: make sure register $25 is picked
27; CHECK: #APP
28; CHECK: addi $25,${{[0-9]+}},1024
29; CHECK: #NO_APP
30 tail call i32 asm sideeffect "addi $0,$1,$2", "=c,c,I"(i32 4194304, i32 1024) nounwind
31
Eric Christopher50ab0392012-05-07 03:13:32 +000032 ret i32 0
33}