Ruchira Sasanka | 94d86e9 | 2001-09-14 20:31:39 +0000 | [diff] [blame] | 1 | #include "llvm/Target/Sparc.h" |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 2 | #include "SparcInternals.h" |
| 3 | #include "llvm/Method.h" |
| 4 | #include "llvm/iTerminators.h" |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 5 | #include "llvm/iOther.h" |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 6 | #include "llvm/CodeGen/InstrScheduling.h" |
| 7 | #include "llvm/CodeGen/InstrSelection.h" |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 8 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 9 | #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h" |
| 10 | #include "llvm/CodeGen/PhyRegAlloc.h" |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 11 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 12 | |
| 13 | |
| 14 | |
| 15 | //--------------------------------------------------------------------------- |
| 16 | // UltraSparcRegInfo |
| 17 | //--------------------------------------------------------------------------- |
| 18 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 19 | //--------------------------------------------------------------------------- |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 20 | // Suggests a register for the ret address in the RET machine instruction |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 21 | //--------------------------------------------------------------------------- |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 22 | void UltraSparcRegInfo::suggestReg4RetAddr(const MachineInstr * RetMI, |
| 23 | LiveRangeInfo& LRI) const { |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 24 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 25 | assert( (RetMI->getNumOperands() == 2) && "RETURN must have 2 operands"); |
| 26 | MachineOperand & MO = ( MachineOperand &) RetMI->getOperand(0); |
| 27 | |
| 28 | MO.setRegForValue( getUnifiedRegNum( IntRegClassID, SparcIntRegOrder::i7) ); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 29 | |
| 30 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 31 | // TODO (Optimize): |
| 32 | //Instead of setting the color, we can suggest one. In that case, |
| 33 | // we have to test later whether it received the suggested color. |
| 34 | // In that case, a LR has to be created at the start of method. |
| 35 | // It has to be done as follows (remove the setRegVal above): |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 36 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 37 | /* |
| 38 | const Value *RetAddrVal = MO.getVRegValue(); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 39 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 40 | assert( RetAddrVal && "LR for ret address must be created at start"); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 41 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 42 | LiveRange * RetAddrLR = LRI.getLiveRangeForValue( RetAddrVal); |
| 43 | RetAddrLR->setSuggestedColor(getUnifiedRegNum( IntRegClassID, |
| 44 | SparcIntRegOrdr::i7) ); |
| 45 | */ |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 46 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 47 | |
| 48 | } |
| 49 | |
| 50 | |
| 51 | //--------------------------------------------------------------------------- |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 52 | // Suggests a register for the ret address in the JMPL/CALL machine instr |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 53 | //--------------------------------------------------------------------------- |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 54 | void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI) const |
| 55 | { |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 56 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 57 | assert( (CallMI->getNumOperands() == 3) && "JMPL must have 3 operands"); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 58 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 59 | // directly set color since the LR of ret address (if there were one) |
| 60 | // will not extend after the call instr |
| 61 | |
| 62 | MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2); |
| 63 | MO.setRegForValue( getUnifiedRegNum( IntRegClassID,SparcIntRegOrder::o7) ); |
| 64 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 65 | } |
| 66 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 67 | |
| 68 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 69 | |
| 70 | //--------------------------------------------------------------------------- |
| 71 | // This method will suggest colors to incoming args to a method. |
| 72 | // If the arg is passed on stack due to the lack of regs, NOTHING will be |
| 73 | // done - it will be colored (or spilled) as a normal value. |
| 74 | //--------------------------------------------------------------------------- |
| 75 | |
| 76 | void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth, |
| 77 | LiveRangeInfo& LRI) const |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 78 | { |
| 79 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 80 | // get the argument list |
| 81 | const Method::ArgumentListType& ArgList = Meth->getArgumentList(); |
| 82 | // get an iterator to arg list |
| 83 | Method::ArgumentListType::const_iterator ArgIt = ArgList.begin(); |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 84 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 85 | // for each argument |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 86 | for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) { |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 87 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 88 | // get the LR of arg |
| 89 | LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 90 | assert( LR && "No live range found for method arg"); |
| 91 | |
| 92 | unsigned RegType = getRegType( LR ); |
| 93 | |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 94 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 95 | // if the arg is in int class - allocate a reg for an int arg |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 96 | if( RegType == IntRegType ) { |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 97 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 98 | if( argNo < NumOfIntArgRegs) { |
| 99 | LR->setSuggestedColor( SparcIntRegOrder::i0 + argNo ); |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 100 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 101 | } |
| 102 | |
| 103 | else { |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 104 | // Do NOTHING as this will be colored as a normal value. |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 105 | if (DEBUG_RA) cerr << " Int Regr not suggested for method arg\n"; |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 106 | } |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 107 | |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 108 | } |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 109 | else if( RegType==FPSingleRegType && (argNo*2+1) < NumOfFloatArgRegs) |
| 110 | LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) ); |
| 111 | |
| 112 | |
| 113 | else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs) |
| 114 | LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) ); |
| 115 | |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 116 | |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 117 | } |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 118 | |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 119 | } |
| 120 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 121 | //--------------------------------------------------------------------------- |
| 122 | // |
| 123 | //--------------------------------------------------------------------------- |
| 124 | |
| 125 | void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth, |
| 126 | LiveRangeInfo& LRI, |
| 127 | AddedInstrns *const FirstAI) const { |
| 128 | |
| 129 | // get the argument list |
| 130 | const Method::ArgumentListType& ArgList = Meth->getArgumentList(); |
| 131 | // get an iterator to arg list |
| 132 | Method::ArgumentListType::const_iterator ArgIt = ArgList.begin(); |
| 133 | |
| 134 | MachineInstr *AdMI; |
| 135 | |
| 136 | |
| 137 | // for each argument |
| 138 | for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) { |
| 139 | |
| 140 | // get the LR of arg |
| 141 | LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt); |
| 142 | assert( LR && "No live range found for method arg"); |
| 143 | |
| 144 | |
| 145 | // if the LR received the suggested color, NOTHING to be done |
| 146 | if( LR->hasSuggestedColor() && LR->hasColor() ) |
| 147 | if( LR->getSuggestedColor() == LR->getColor() ) |
| 148 | continue; |
| 149 | |
| 150 | // We are here because the LR did not have a suggested |
| 151 | // color or did not receive the suggested color. Now handle |
| 152 | // individual cases. |
| 153 | |
| 154 | |
| 155 | unsigned RegType = getRegType( LR ); |
| 156 | unsigned RegClassID = (LR->getRegClass())->getID(); |
| 157 | |
| 158 | |
| 159 | // find whether this argument is coming in a register (if not, on stack) |
| 160 | |
| 161 | bool isArgInReg = false; |
| 162 | unsigned UniArgReg = InvalidRegNum; |
| 163 | |
| 164 | if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) { |
| 165 | isArgInReg = true; |
| 166 | UniArgReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::o0 + argNo ); |
| 167 | } |
| 168 | else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) { |
| 169 | isArgInReg = true; |
| 170 | UniArgReg = getUnifiedRegNum( RegClassID, |
| 171 | SparcFloatRegOrder::f0 + argNo*2 + 1 ) ; |
| 172 | } |
| 173 | else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) { |
| 174 | isArgInReg = true; |
| 175 | UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2); |
| 176 | } |
| 177 | |
| 178 | |
| 179 | if( LR->hasColor() ) { |
| 180 | |
| 181 | // We are here because the LR did not have a suggested |
| 182 | // color or did not receive the suggested color but LR got a register. |
| 183 | // Now we have to copy %ix reg (or stack pos of arg) |
| 184 | // to the register it was colored with. |
| 185 | |
| 186 | unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() ); |
| 187 | |
| 188 | // if the arg is coming in a register and goes into a register |
| 189 | if( isArgInReg ) |
| 190 | AdMI = cpReg2RegMI(UniArgReg, UniLRReg, RegType ); |
| 191 | |
| 192 | else |
| 193 | assert(0 && "TODO: Color an Incoming arg on stack"); |
| 194 | |
| 195 | // Now add the instruction |
| 196 | FirstAI->InstrnsBefore.push_back( AdMI ); |
| 197 | |
| 198 | } |
| 199 | |
| 200 | else { // LR is not colored (i.e., spilled) |
| 201 | |
| 202 | assert(0 && "TODO: Color a spilled arg "); |
| 203 | |
| 204 | } |
| 205 | |
| 206 | |
| 207 | } // for each incoming argument |
| 208 | |
| 209 | } |
| 210 | |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 211 | |
| 212 | |
| 213 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 214 | //--------------------------------------------------------------------------- |
| 215 | // This method is called before graph coloring to suggest colors to the |
| 216 | // outgoing call args and the return value of the call. |
| 217 | //--------------------------------------------------------------------------- |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 218 | void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI, |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 219 | LiveRangeInfo& LRI, |
| 220 | vector<RegClass *> RCList) const { |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 221 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 222 | assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) ); |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 223 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 224 | suggestReg4CallAddr(CallMI); |
| 225 | |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 226 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 227 | // First color the return value of the call instruction. The return value |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 228 | // will be in %o0 if the value is an integer type, or in %f0 if the |
| 229 | // value is a float type. |
| 230 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 231 | // the return value cannot have a LR in machine instruction since it is |
| 232 | // only defined by the call instruction |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 233 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 234 | // if type is not void, create a new live range and set its |
| 235 | // register class and add to LRI |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 236 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 237 | unsigned NumOfImpRefs = CallMI->getNumImplicitRefs(); |
| 238 | unsigned NumOfCallArgs = NumOfImpRefs; // assume all implicits are args |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 239 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 240 | if( NumOfImpRefs > 0 ) { |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 241 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 242 | // The last implicit operand is the return value of a call |
| 243 | if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) ) { |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 244 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 245 | const Value *RetVal = CallMI->getImplicitRef(NumOfImpRefs-1); |
| 246 | |
| 247 | assert( (! LRI.getLiveRangeForValue( RetVal ) ) && |
| 248 | "LR for ret Value of call already definded!"); |
| 249 | |
| 250 | |
| 251 | // create a new LR for the return value |
| 252 | |
| 253 | LiveRange * RetValLR = new LiveRange(); |
| 254 | RetValLR->add( RetVal ); |
| 255 | unsigned RegClassID = getRegClassIDOfValue( RetVal ); |
| 256 | RetValLR->setRegClass( RCList[RegClassID] ); |
| 257 | LRI.addLRToMap( RetVal, RetValLR); |
| 258 | |
| 259 | // now suggest a register depending on the register class of ret arg |
| 260 | |
| 261 | if( RegClassID == IntRegClassID ) |
| 262 | RetValLR->setSuggestedColor(SparcIntRegOrder::o0); |
| 263 | else if (RegClassID == FloatRegClassID ) |
| 264 | RetValLR->setSuggestedColor(SparcFloatRegOrder::f0 ); |
| 265 | else assert( 0 && "Unknown reg class for return value of call\n"); |
| 266 | |
| 267 | // the last imp ref is the def, so one less arg |
| 268 | NumOfCallArgs--; |
| 269 | |
| 270 | } |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 271 | |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 272 | } |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 273 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 274 | // Now suggest colors for arguments (operands) of the call instruction. |
| 275 | // Colors are suggested only if the arg number is smaller than the |
| 276 | // the number of registers allocated for argument passing. |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 277 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 278 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 279 | // go thru call args - implicit operands of the call MI |
| 280 | for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) { |
| 281 | |
| 282 | const Value *CallArg = CallMI->getImplicitRef(i); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 283 | |
| 284 | // get the LR of call operand (parameter) |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 285 | LiveRange *const LR = LRI.getLiveRangeForValue(CallArg); |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 286 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 287 | // not possible to have a null LR since all args (even consts) |
| 288 | // must be defined before |
| 289 | if( !LR ) { |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 290 | if( DEBUG_RA) { |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 291 | cerr << " ERROR: In call instr, no LR for arg: " ; |
| 292 | printValue(CallArg); cerr << endl; |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 293 | } |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 294 | assert(0 && "NO LR for call arg"); |
| 295 | // continue; |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 296 | } |
| 297 | |
| 298 | unsigned RegType = getRegType( LR ); |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 299 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 300 | // if the arg is in int class - allocate a reg for an int arg |
| 301 | if( RegType == IntRegType ) { |
| 302 | |
| 303 | if( argNo < NumOfIntArgRegs) |
| 304 | LR->setSuggestedColor( SparcIntRegOrder::o0 + argNo ); |
| 305 | |
| 306 | else if (DEBUG_RA) |
| 307 | // Do NOTHING as this will be colored as a normal value. |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 308 | cerr << " Regr not suggested for int call arg" << endl; |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 309 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 310 | } |
| 311 | else if( RegType == FPSingleRegType && (argNo*2 +1)< NumOfFloatArgRegs) |
| 312 | LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) ); |
| 313 | |
| 314 | |
| 315 | else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs) |
| 316 | LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) ); |
| 317 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 318 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 319 | } // for all call arguments |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 320 | |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 321 | } |
| 322 | |
| 323 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 324 | //--------------------------------------------------------------------------- |
| 325 | // After graph coloring, we have call this method to see whehter the return |
| 326 | // value and the call args received the correct colors. If not, we have |
| 327 | // to instert copy instructions. |
| 328 | //--------------------------------------------------------------------------- |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 329 | |
| 330 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 331 | void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI, |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 332 | LiveRangeInfo& LRI, |
| 333 | AddedInstrns *const CallAI) const { |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 334 | |
| 335 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 336 | assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) ); |
| 337 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 338 | // First color the return value of the call. |
| 339 | // If there is a LR for the return value, it means this |
| 340 | // method returns a value |
| 341 | |
| 342 | MachineInstr *AdMI; |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 343 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 344 | unsigned NumOfImpRefs = CallMI->getNumImplicitRefs(); |
| 345 | unsigned NumOfCallArgs = NumOfImpRefs; // assume all implicits are args |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 346 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 347 | if( NumOfImpRefs > 0 ) { |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 348 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 349 | // The last implicit operand is the return value of a call |
| 350 | if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) ) { |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 351 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 352 | // one less call arg since last implicit ref is the return value |
| 353 | NumOfCallArgs--; |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 354 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 355 | // find the return value and its LR |
| 356 | const Value *RetVal = CallMI->getImplicitRef(NumOfImpRefs-1); |
| 357 | LiveRange * RetValLR = LRI.getLiveRangeForValue( RetVal ); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 358 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 359 | if( !RetValLR ) { |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 360 | cerr << "\nNo LR for:"; |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 361 | printValue( RetVal ); |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 362 | cerr << endl; |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 363 | assert( RetValLR && "ERR:No LR for non-void return value"); |
| 364 | //return; |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 365 | } |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 366 | |
| 367 | bool recvSugColor = false; |
| 368 | |
| 369 | if( RetValLR->hasSuggestedColor() && RetValLR->hasColor() ) |
| 370 | if( RetValLR->getSuggestedColor() == RetValLR->getColor()) |
| 371 | recvSugColor = true; |
| 372 | |
| 373 | // if we didn't receive the suggested color for some reason, |
| 374 | // put copy instruction |
| 375 | |
| 376 | if( !recvSugColor ) { |
| 377 | |
| 378 | if( RetValLR->hasColor() ) { |
| 379 | |
| 380 | unsigned RegType = getRegType( RetValLR ); |
| 381 | unsigned RegClassID = (RetValLR->getRegClass())->getID(); |
| 382 | |
| 383 | unsigned |
| 384 | UniRetLRReg=getUnifiedRegNum(RegClassID,RetValLR->getColor()); |
| 385 | unsigned UniRetReg = InvalidRegNum; |
| 386 | |
| 387 | // find where we receive the return value depending on |
| 388 | // register class |
| 389 | |
| 390 | if(RegClassID == IntRegClassID) |
| 391 | UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::o0); |
| 392 | else if(RegClassID == FloatRegClassID) |
| 393 | UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0); |
| 394 | |
| 395 | |
| 396 | AdMI = cpReg2RegMI(UniRetLRReg, UniRetReg, RegType ); |
| 397 | CallAI->InstrnsAfter.push_back( AdMI ); |
| 398 | |
| 399 | |
| 400 | } // if LR has color |
| 401 | else { |
| 402 | |
| 403 | assert(0 && "LR of return value is splilled"); |
| 404 | } |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 405 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 406 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 407 | } // the LR didn't receive the suggested color |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 408 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 409 | } // if there a return value |
| 410 | |
| 411 | } // if there is an implicit arg for a return value |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 412 | |
| 413 | |
| 414 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 415 | // Now color all args of the call instruction |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 416 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 417 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 418 | for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) { |
| 419 | |
| 420 | const Value *CallArg = CallMI->getImplicitRef(i); |
| 421 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 422 | // get the LR of call operand (parameter) |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 423 | LiveRange *const LR = LRI.getLiveRangeForValue(CallArg); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 424 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 425 | unsigned RegType = getRegType( CallArg ); |
| 426 | unsigned RegClassID = getRegClassIDOfValue( CallArg); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 427 | |
| 428 | // find whether this argument is coming in a register (if not, on stack) |
| 429 | |
| 430 | bool isArgInReg = false; |
| 431 | unsigned UniArgReg = InvalidRegNum; |
| 432 | |
| 433 | if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) { |
| 434 | isArgInReg = true; |
| 435 | UniArgReg = getUnifiedRegNum(RegClassID, SparcIntRegOrder::o0 + argNo ); |
| 436 | } |
| 437 | else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) { |
| 438 | isArgInReg = true; |
| 439 | UniArgReg = getUnifiedRegNum(RegClassID, |
| 440 | SparcFloatRegOrder::f0 + (argNo*2 + 1) ); |
| 441 | } |
| 442 | else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) { |
| 443 | isArgInReg = true; |
| 444 | UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2); |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 445 | } |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 446 | |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 447 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 448 | // not possible to have a null LR since all args (even consts) |
| 449 | // must be defined before |
| 450 | if( !LR ) { |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 451 | if( DEBUG_RA) { |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 452 | cerr << " ERROR: In call instr, no LR for arg: " ; |
| 453 | printValue(CallArg); cerr << endl; |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 454 | } |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 455 | assert(0 && "NO LR for call arg"); |
| 456 | // continue; |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 457 | } |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 458 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 459 | |
| 460 | // if the LR received the suggested color, NOTHING to do |
| 461 | |
| 462 | if( LR->hasSuggestedColor() && LR->hasColor() ) |
| 463 | if( LR->getSuggestedColor() == LR->getColor() ) |
| 464 | continue; |
| 465 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 466 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 467 | if( LR->hasColor() ) { |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 468 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 469 | // We are here because though the LR is allocated a register, it |
| 470 | // was not allocated the suggested register. So, we have to copy %ix reg |
| 471 | // (or stack pos of arg) to the register it was colored with |
| 472 | |
| 473 | |
| 474 | unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() ); |
| 475 | |
| 476 | if( isArgInReg ) |
| 477 | AdMI = cpReg2RegMI(UniLRReg, UniArgReg, RegType ); |
| 478 | |
| 479 | else |
| 480 | assert(0 && "TODO: Push an outgoing arg on stack"); |
| 481 | |
| 482 | // Now add the instruction |
| 483 | CallAI->InstrnsBefore.push_back( AdMI ); |
| 484 | |
| 485 | } |
| 486 | |
| 487 | else { // LR is not colored (i.e., spilled) |
| 488 | |
| 489 | assert(0 && "TODO: Copy a spilled call arg to an output reg "); |
| 490 | |
| 491 | } |
| 492 | |
| 493 | } // for each parameter in call instruction |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 494 | |
| 495 | } |
| 496 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 497 | //--------------------------------------------------------------------------- |
| 498 | // This method is called for an LLVM return instruction to identify which |
| 499 | // values will be returned from this method and to suggest colors. |
| 500 | //--------------------------------------------------------------------------- |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 501 | void UltraSparcRegInfo::suggestReg4RetValue(const MachineInstr *const RetMI, |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 502 | LiveRangeInfo& LRI) const { |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 503 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 504 | assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) ); |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 505 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 506 | |
| 507 | suggestReg4RetAddr(RetMI, LRI); |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 508 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 509 | // if there is an implicit ref, that has to be the ret value |
| 510 | if( RetMI->getNumImplicitRefs() > 0 ) { |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 511 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 512 | // The first implicit operand is the return value of a return instr |
| 513 | const Value *RetVal = RetMI->getImplicitRef(0); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 514 | |
| 515 | MachineInstr *AdMI; |
| 516 | LiveRange *const LR = LRI.getLiveRangeForValue( RetVal ); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 517 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 518 | if( !LR ) { |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 519 | cerr << "\nNo LR for:"; |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 520 | printValue( RetVal ); |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 521 | cerr << endl; |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 522 | assert( LR && "No LR for return value of non-void method"); |
| 523 | //return; |
| 524 | } |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 525 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 526 | unsigned RegClassID = (LR->getRegClass())->getID(); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 527 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 528 | if( RegClassID == IntRegClassID ) |
| 529 | LR->setSuggestedColor(SparcIntRegOrder::i0); |
| 530 | |
| 531 | else if ( RegClassID == FloatRegClassID ) |
| 532 | LR->setSuggestedColor(SparcFloatRegOrder::f0); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 533 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 534 | } |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 535 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 536 | } |
| 537 | |
| 538 | //--------------------------------------------------------------------------- |
| 539 | |
| 540 | //--------------------------------------------------------------------------- |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 541 | void UltraSparcRegInfo::colorRetValue(const MachineInstr *const RetMI, |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 542 | LiveRangeInfo& LRI, |
| 543 | AddedInstrns *const RetAI) const { |
| 544 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 545 | assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) ); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 546 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 547 | // if there is an implicit ref, that has to be the ret value |
| 548 | if( RetMI->getNumImplicitRefs() > 0 ) { |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 549 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 550 | // The first implicit operand is the return value of a return instr |
| 551 | const Value *RetVal = RetMI->getImplicitRef(0); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 552 | |
| 553 | MachineInstr *AdMI; |
| 554 | LiveRange *const LR = LRI.getLiveRangeForValue( RetVal ); |
| 555 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 556 | if( ! LR ) { |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 557 | cerr << "\nNo LR for:"; |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 558 | printValue( RetVal ); |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 559 | cerr << endl; |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 560 | // assert( LR && "No LR for return value of non-void method"); |
| 561 | return; |
| 562 | } |
| 563 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 564 | unsigned RegClassID = getRegClassIDOfValue(RetVal); |
| 565 | unsigned RegType = getRegType( RetVal ); |
| 566 | unsigned UniRetReg = InvalidRegNum; |
| 567 | |
| 568 | if(RegClassID == IntRegClassID) |
| 569 | UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0 ); |
| 570 | else if(RegClassID == FloatRegClassID) |
| 571 | UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0); |
| 572 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 573 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 574 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 575 | // if the LR received the suggested color, NOTHING to do |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 576 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 577 | if( LR->hasSuggestedColor() && LR->hasColor() ) |
| 578 | if( LR->getSuggestedColor() == LR->getColor() ) |
| 579 | return; |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 580 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 581 | if( LR->hasColor() ) { |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 582 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 583 | // We are here because the LR was allocted a regiter, but NOT |
| 584 | // the correct register. |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 585 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 586 | // copy the LR of retun value to i0 or f0 |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 587 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 588 | unsigned UniLRReg =getUnifiedRegNum( RegClassID, LR->getColor()); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 589 | |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 590 | if(RegClassID == IntRegClassID) |
| 591 | UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0); |
| 592 | else if(RegClassID == FloatRegClassID) |
| 593 | UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0); |
| 594 | |
| 595 | AdMI = cpReg2RegMI( UniLRReg, UniRetReg, RegType); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 596 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 597 | } |
Ruchira Sasanka | cc3ccac | 2001-10-15 16:25:28 +0000 | [diff] [blame] | 598 | else |
| 599 | assert(0 && "TODO: Copy the return value from stack\n"); |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 600 | |
| 601 | } // if there is a return value |
| 602 | |
| 603 | } |
| 604 | |
| 605 | |
| 606 | //--------------------------------------------------------------------------- |
| 607 | // Copy from a register to register. Register number must be the unified |
| 608 | // register number |
| 609 | //--------------------------------------------------------------------------- |
| 610 | |
| 611 | |
| 612 | MachineInstr * UltraSparcRegInfo::cpReg2RegMI(const unsigned SrcReg, |
| 613 | const unsigned DestReg, |
| 614 | const int RegType) const { |
| 615 | |
| 616 | assert( (SrcReg != InvalidRegNum) && (DestReg != InvalidRegNum) && |
| 617 | "Invalid Register"); |
| 618 | |
| 619 | MachineInstr * MI = NULL; |
| 620 | |
| 621 | switch( RegType ) { |
| 622 | |
| 623 | case IntRegType: |
| 624 | MI = new MachineInstr(ADD, 3); |
| 625 | MI->SetMachineOperand(0, SrcReg, false); |
| 626 | MI->SetMachineOperand(1, SparcIntRegOrder::g0, false); |
| 627 | MI->SetMachineOperand(2, DestReg, true); |
| 628 | break; |
| 629 | |
| 630 | case FPSingleRegType: |
| 631 | MI = new MachineInstr(FMOVS, 2); |
| 632 | MI->SetMachineOperand(0, SrcReg, false); |
| 633 | MI->SetMachineOperand(1, DestReg, true); |
| 634 | break; |
| 635 | |
| 636 | case FPDoubleRegType: |
| 637 | MI = new MachineInstr(FMOVD, 2); |
| 638 | MI->SetMachineOperand(0, SrcReg, false); |
| 639 | MI->SetMachineOperand(1, DestReg, true); |
| 640 | break; |
| 641 | |
| 642 | default: |
| 643 | assert(0 && "Unknow RegType"); |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 644 | } |
| 645 | |
| 646 | return MI; |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 647 | } |
Chris Lattner | 20b1ea0 | 2001-09-14 03:47:57 +0000 | [diff] [blame] | 648 | |
| 649 | |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 650 | |
| 651 | |
| 652 | //--------------------------------------------------------------------------- |
| 653 | // Only constant/label values are accepted. |
| 654 | // ***This code is temporary *** |
| 655 | //--------------------------------------------------------------------------- |
| 656 | |
| 657 | |
| 658 | MachineInstr * UltraSparcRegInfo::cpValue2RegMI(Value * Val, |
| 659 | const unsigned DestReg, |
| 660 | const int RegType) const { |
| 661 | |
| 662 | assert( (DestReg != InvalidRegNum) && "Invalid Register"); |
| 663 | |
| 664 | /* |
| 665 | unsigned MReg; |
| 666 | int64_t Imm; |
| 667 | |
| 668 | MachineOperand::MachineOperandType MOTypeInt = |
| 669 | ChooseRegOrImmed(Val, ADD, *UltraSparcInfo, true, MReg, Imm); |
| 670 | */ |
| 671 | |
| 672 | MachineOperand::MachineOperandType MOType; |
| 673 | |
| 674 | switch( Val->getValueType() ) { |
| 675 | |
| 676 | case Value::ConstantVal: |
Chris Lattner | ef9c23f | 2001-10-03 14:53:21 +0000 | [diff] [blame] | 677 | case Value::GlobalVariableVal: |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 678 | MOType = MachineOperand:: MO_UnextendedImmed; // TODO**** correct??? |
| 679 | break; |
| 680 | |
| 681 | case Value::BasicBlockVal: |
| 682 | case Value::MethodVal: |
| 683 | MOType = MachineOperand::MO_PCRelativeDisp; |
| 684 | break; |
| 685 | |
| 686 | default: |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 687 | cerr << "Value Type: " << Val->getValueType() << endl; |
Ruchira Sasanka | 9144228 | 2001-09-30 23:16:47 +0000 | [diff] [blame] | 688 | assert(0 && "Unknown val type - Only constants/globals/labels are valid"); |
| 689 | } |
| 690 | |
| 691 | |
| 692 | |
| 693 | MachineInstr * MI = NULL; |
| 694 | |
| 695 | switch( RegType ) { |
| 696 | |
| 697 | case IntRegType: |
| 698 | MI = new MachineInstr(ADD); |
| 699 | MI->SetMachineOperand(0, MOType, Val, false); |
| 700 | MI->SetMachineOperand(1, SparcIntRegOrder::g0, false); |
| 701 | MI->SetMachineOperand(2, DestReg, true); |
| 702 | break; |
| 703 | |
| 704 | case FPSingleRegType: |
| 705 | assert(0 && "FP const move not yet implemented"); |
| 706 | MI = new MachineInstr(FMOVS); |
| 707 | MI->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, Val, false); |
| 708 | MI->SetMachineOperand(1, DestReg, true); |
| 709 | break; |
| 710 | |
| 711 | case FPDoubleRegType: |
| 712 | assert(0 && "FP const move not yet implemented"); |
| 713 | MI = new MachineInstr(FMOVD); |
| 714 | MI->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, Val, false); |
| 715 | MI->SetMachineOperand(1, DestReg, true); |
| 716 | break; |
| 717 | |
| 718 | default: |
| 719 | assert(0 && "Unknow RegType"); |
| 720 | } |
| 721 | |
| 722 | return MI; |
| 723 | } |
| 724 | |
| 725 | |
| 726 | |
| 727 | |
| 728 | |
| 729 | |
| 730 | |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 731 | //--------------------------------------------------------------------------- |
| 732 | // Print the register assigned to a LR |
| 733 | //--------------------------------------------------------------------------- |
| 734 | |
| 735 | void UltraSparcRegInfo::printReg(const LiveRange *const LR) { |
| 736 | |
| 737 | unsigned RegClassID = (LR->getRegClass())->getID(); |
| 738 | |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 739 | cerr << " *Node " << (LR->getUserIGNode())->getIndex(); |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 740 | |
| 741 | if( ! LR->hasColor() ) { |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 742 | cerr << " - could not find a color" << endl; |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 743 | return; |
| 744 | } |
| 745 | |
| 746 | // if a color is found |
| 747 | |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 748 | cerr << " colored with color "<< LR->getColor(); |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 749 | |
| 750 | if( RegClassID == IntRegClassID ) { |
| 751 | |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 752 | cerr<< " [" << SparcIntRegOrder::getRegName(LR->getColor()) ; |
| 753 | cerr << "]" << endl; |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 754 | } |
| 755 | else if ( RegClassID == FloatRegClassID) { |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 756 | cerr << "[" << SparcFloatRegOrder::getRegName(LR->getColor()); |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 757 | if( LR->getTypeID() == Type::DoubleTyID ) |
Chris Lattner | 1e23ed7 | 2001-10-15 18:15:27 +0000 | [diff] [blame^] | 758 | cerr << "+" << SparcFloatRegOrder::getRegName(LR->getColor()+1); |
| 759 | cerr << "]" << endl; |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 760 | } |
Ruchira Sasanka | 89fb46b | 2001-09-18 22:52:44 +0000 | [diff] [blame] | 761 | } |