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Ruchira Sasanka94d86e92001-09-14 20:31:39 +00001#include "llvm/Target/Sparc.h"
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +00002#include "SparcInternals.h"
3#include "llvm/Method.h"
4#include "llvm/iTerminators.h"
Ruchira Sasanka91442282001-09-30 23:16:47 +00005#include "llvm/iOther.h"
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +00006#include "llvm/CodeGen/InstrScheduling.h"
7#include "llvm/CodeGen/InstrSelection.h"
Chris Lattner20b1ea02001-09-14 03:47:57 +00008
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +00009#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
10#include "llvm/CodeGen/PhyRegAlloc.h"
Chris Lattner20b1ea02001-09-14 03:47:57 +000011
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +000012
13
14
15//---------------------------------------------------------------------------
16// UltraSparcRegInfo
17//---------------------------------------------------------------------------
18
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +000019//---------------------------------------------------------------------------
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000020// Suggests a register for the ret address in the RET machine instruction
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +000021//---------------------------------------------------------------------------
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000022void UltraSparcRegInfo::suggestReg4RetAddr(const MachineInstr * RetMI,
23 LiveRangeInfo& LRI) const {
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +000024
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000025 assert( (RetMI->getNumOperands() == 2) && "RETURN must have 2 operands");
26 MachineOperand & MO = ( MachineOperand &) RetMI->getOperand(0);
27
28 MO.setRegForValue( getUnifiedRegNum( IntRegClassID, SparcIntRegOrder::i7) );
Ruchira Sasanka91442282001-09-30 23:16:47 +000029
30
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000031 // TODO (Optimize):
32 //Instead of setting the color, we can suggest one. In that case,
33 // we have to test later whether it received the suggested color.
34 // In that case, a LR has to be created at the start of method.
35 // It has to be done as follows (remove the setRegVal above):
Ruchira Sasanka91442282001-09-30 23:16:47 +000036
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000037 /*
38 const Value *RetAddrVal = MO.getVRegValue();
Ruchira Sasanka91442282001-09-30 23:16:47 +000039
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000040 assert( RetAddrVal && "LR for ret address must be created at start");
Ruchira Sasanka91442282001-09-30 23:16:47 +000041
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000042 LiveRange * RetAddrLR = LRI.getLiveRangeForValue( RetAddrVal);
43 RetAddrLR->setSuggestedColor(getUnifiedRegNum( IntRegClassID,
44 SparcIntRegOrdr::i7) );
45 */
Ruchira Sasanka91442282001-09-30 23:16:47 +000046
Ruchira Sasanka91442282001-09-30 23:16:47 +000047
48}
49
50
51//---------------------------------------------------------------------------
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000052// Suggests a register for the ret address in the JMPL/CALL machine instr
Ruchira Sasanka91442282001-09-30 23:16:47 +000053//---------------------------------------------------------------------------
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000054void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI) const
55{
Ruchira Sasanka91442282001-09-30 23:16:47 +000056
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000057 assert( (CallMI->getNumOperands() == 3) && "JMPL must have 3 operands");
Ruchira Sasanka91442282001-09-30 23:16:47 +000058
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000059 // directly set color since the LR of ret address (if there were one)
60 // will not extend after the call instr
61
62 MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
63 MO.setRegForValue( getUnifiedRegNum( IntRegClassID,SparcIntRegOrder::o7) );
64
Ruchira Sasanka91442282001-09-30 23:16:47 +000065}
66
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +000067
68
Ruchira Sasanka91442282001-09-30 23:16:47 +000069
70//---------------------------------------------------------------------------
71// This method will suggest colors to incoming args to a method.
72// If the arg is passed on stack due to the lack of regs, NOTHING will be
73// done - it will be colored (or spilled) as a normal value.
74//---------------------------------------------------------------------------
75
76void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth,
77 LiveRangeInfo& LRI) const
Chris Lattner20b1ea02001-09-14 03:47:57 +000078{
79
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +000080 // get the argument list
81 const Method::ArgumentListType& ArgList = Meth->getArgumentList();
82 // get an iterator to arg list
83 Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
Chris Lattner20b1ea02001-09-14 03:47:57 +000084
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +000085 // for each argument
Ruchira Sasanka91442282001-09-30 23:16:47 +000086 for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
Chris Lattner20b1ea02001-09-14 03:47:57 +000087
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +000088 // get the LR of arg
89 LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
Ruchira Sasanka91442282001-09-30 23:16:47 +000090 assert( LR && "No live range found for method arg");
91
92 unsigned RegType = getRegType( LR );
93
Chris Lattner20b1ea02001-09-14 03:47:57 +000094
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +000095 // if the arg is in int class - allocate a reg for an int arg
Ruchira Sasanka91442282001-09-30 23:16:47 +000096 if( RegType == IntRegType ) {
Chris Lattner20b1ea02001-09-14 03:47:57 +000097
Ruchira Sasanka91442282001-09-30 23:16:47 +000098 if( argNo < NumOfIntArgRegs) {
99 LR->setSuggestedColor( SparcIntRegOrder::i0 + argNo );
Chris Lattner20b1ea02001-09-14 03:47:57 +0000100
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000101 }
102
103 else {
Ruchira Sasanka91442282001-09-30 23:16:47 +0000104 // Do NOTHING as this will be colored as a normal value.
Chris Lattner1e23ed72001-10-15 18:15:27 +0000105 if (DEBUG_RA) cerr << " Int Regr not suggested for method arg\n";
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000106 }
Ruchira Sasanka91442282001-09-30 23:16:47 +0000107
Chris Lattner20b1ea02001-09-14 03:47:57 +0000108 }
Ruchira Sasanka91442282001-09-30 23:16:47 +0000109 else if( RegType==FPSingleRegType && (argNo*2+1) < NumOfFloatArgRegs)
110 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
111
112
113 else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
114 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
115
Chris Lattner20b1ea02001-09-14 03:47:57 +0000116
Chris Lattner20b1ea02001-09-14 03:47:57 +0000117 }
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000118
Chris Lattner20b1ea02001-09-14 03:47:57 +0000119}
120
Ruchira Sasanka91442282001-09-30 23:16:47 +0000121//---------------------------------------------------------------------------
122//
123//---------------------------------------------------------------------------
124
125void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
126 LiveRangeInfo& LRI,
127 AddedInstrns *const FirstAI) const {
128
129 // get the argument list
130 const Method::ArgumentListType& ArgList = Meth->getArgumentList();
131 // get an iterator to arg list
132 Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
133
134 MachineInstr *AdMI;
135
136
137 // for each argument
138 for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
139
140 // get the LR of arg
141 LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
142 assert( LR && "No live range found for method arg");
143
144
145 // if the LR received the suggested color, NOTHING to be done
146 if( LR->hasSuggestedColor() && LR->hasColor() )
147 if( LR->getSuggestedColor() == LR->getColor() )
148 continue;
149
150 // We are here because the LR did not have a suggested
151 // color or did not receive the suggested color. Now handle
152 // individual cases.
153
154
155 unsigned RegType = getRegType( LR );
156 unsigned RegClassID = (LR->getRegClass())->getID();
157
158
159 // find whether this argument is coming in a register (if not, on stack)
160
161 bool isArgInReg = false;
162 unsigned UniArgReg = InvalidRegNum;
163
164 if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
165 isArgInReg = true;
166 UniArgReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::o0 + argNo );
167 }
168 else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
169 isArgInReg = true;
170 UniArgReg = getUnifiedRegNum( RegClassID,
171 SparcFloatRegOrder::f0 + argNo*2 + 1 ) ;
172 }
173 else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
174 isArgInReg = true;
175 UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
176 }
177
178
179 if( LR->hasColor() ) {
180
181 // We are here because the LR did not have a suggested
182 // color or did not receive the suggested color but LR got a register.
183 // Now we have to copy %ix reg (or stack pos of arg)
184 // to the register it was colored with.
185
186 unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
187
188 // if the arg is coming in a register and goes into a register
189 if( isArgInReg )
190 AdMI = cpReg2RegMI(UniArgReg, UniLRReg, RegType );
191
192 else
193 assert(0 && "TODO: Color an Incoming arg on stack");
194
195 // Now add the instruction
196 FirstAI->InstrnsBefore.push_back( AdMI );
197
198 }
199
200 else { // LR is not colored (i.e., spilled)
201
202 assert(0 && "TODO: Color a spilled arg ");
203
204 }
205
206
207 } // for each incoming argument
208
209}
210
Chris Lattner20b1ea02001-09-14 03:47:57 +0000211
212
213
Ruchira Sasanka91442282001-09-30 23:16:47 +0000214//---------------------------------------------------------------------------
215// This method is called before graph coloring to suggest colors to the
216// outgoing call args and the return value of the call.
217//---------------------------------------------------------------------------
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000218void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI,
Ruchira Sasanka91442282001-09-30 23:16:47 +0000219 LiveRangeInfo& LRI,
220 vector<RegClass *> RCList) const {
Chris Lattner20b1ea02001-09-14 03:47:57 +0000221
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000222 assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
Chris Lattner20b1ea02001-09-14 03:47:57 +0000223
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000224 suggestReg4CallAddr(CallMI);
225
Chris Lattner20b1ea02001-09-14 03:47:57 +0000226
Ruchira Sasanka91442282001-09-30 23:16:47 +0000227 // First color the return value of the call instruction. The return value
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000228 // will be in %o0 if the value is an integer type, or in %f0 if the
229 // value is a float type.
230
Ruchira Sasanka91442282001-09-30 23:16:47 +0000231 // the return value cannot have a LR in machine instruction since it is
232 // only defined by the call instruction
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000233
Ruchira Sasanka91442282001-09-30 23:16:47 +0000234 // if type is not void, create a new live range and set its
235 // register class and add to LRI
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000236
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000237 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
238 unsigned NumOfCallArgs = NumOfImpRefs; // assume all implicits are args
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000239
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000240 if( NumOfImpRefs > 0 ) {
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000241
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000242 // The last implicit operand is the return value of a call
243 if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) ) {
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000244
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000245 const Value *RetVal = CallMI->getImplicitRef(NumOfImpRefs-1);
246
247 assert( (! LRI.getLiveRangeForValue( RetVal ) ) &&
248 "LR for ret Value of call already definded!");
249
250
251 // create a new LR for the return value
252
253 LiveRange * RetValLR = new LiveRange();
254 RetValLR->add( RetVal );
255 unsigned RegClassID = getRegClassIDOfValue( RetVal );
256 RetValLR->setRegClass( RCList[RegClassID] );
257 LRI.addLRToMap( RetVal, RetValLR);
258
259 // now suggest a register depending on the register class of ret arg
260
261 if( RegClassID == IntRegClassID )
262 RetValLR->setSuggestedColor(SparcIntRegOrder::o0);
263 else if (RegClassID == FloatRegClassID )
264 RetValLR->setSuggestedColor(SparcFloatRegOrder::f0 );
265 else assert( 0 && "Unknown reg class for return value of call\n");
266
267 // the last imp ref is the def, so one less arg
268 NumOfCallArgs--;
269
270 }
Ruchira Sasanka91442282001-09-30 23:16:47 +0000271
Chris Lattner20b1ea02001-09-14 03:47:57 +0000272 }
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000273
Ruchira Sasanka91442282001-09-30 23:16:47 +0000274 // Now suggest colors for arguments (operands) of the call instruction.
275 // Colors are suggested only if the arg number is smaller than the
276 // the number of registers allocated for argument passing.
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000277
Ruchira Sasanka91442282001-09-30 23:16:47 +0000278
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000279 // go thru call args - implicit operands of the call MI
280 for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
281
282 const Value *CallArg = CallMI->getImplicitRef(i);
Ruchira Sasanka91442282001-09-30 23:16:47 +0000283
284 // get the LR of call operand (parameter)
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000285 LiveRange *const LR = LRI.getLiveRangeForValue(CallArg);
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000286
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000287 // not possible to have a null LR since all args (even consts)
288 // must be defined before
289 if( !LR ) {
Ruchira Sasanka91442282001-09-30 23:16:47 +0000290 if( DEBUG_RA) {
Chris Lattner1e23ed72001-10-15 18:15:27 +0000291 cerr << " ERROR: In call instr, no LR for arg: " ;
292 printValue(CallArg); cerr << endl;
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000293 }
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000294 assert(0 && "NO LR for call arg");
295 // continue;
Ruchira Sasanka91442282001-09-30 23:16:47 +0000296 }
297
298 unsigned RegType = getRegType( LR );
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000299
Ruchira Sasanka91442282001-09-30 23:16:47 +0000300 // if the arg is in int class - allocate a reg for an int arg
301 if( RegType == IntRegType ) {
302
303 if( argNo < NumOfIntArgRegs)
304 LR->setSuggestedColor( SparcIntRegOrder::o0 + argNo );
305
306 else if (DEBUG_RA)
307 // Do NOTHING as this will be colored as a normal value.
Chris Lattner1e23ed72001-10-15 18:15:27 +0000308 cerr << " Regr not suggested for int call arg" << endl;
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000309
Ruchira Sasanka91442282001-09-30 23:16:47 +0000310 }
311 else if( RegType == FPSingleRegType && (argNo*2 +1)< NumOfFloatArgRegs)
312 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
313
314
315 else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
316 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
317
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000318
Ruchira Sasanka91442282001-09-30 23:16:47 +0000319 } // for all call arguments
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000320
Chris Lattner20b1ea02001-09-14 03:47:57 +0000321}
322
323
Ruchira Sasanka91442282001-09-30 23:16:47 +0000324//---------------------------------------------------------------------------
325// After graph coloring, we have call this method to see whehter the return
326// value and the call args received the correct colors. If not, we have
327// to instert copy instructions.
328//---------------------------------------------------------------------------
Chris Lattner20b1ea02001-09-14 03:47:57 +0000329
330
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000331void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
Ruchira Sasanka91442282001-09-30 23:16:47 +0000332 LiveRangeInfo& LRI,
333 AddedInstrns *const CallAI) const {
Chris Lattner20b1ea02001-09-14 03:47:57 +0000334
335
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000336 assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
337
Ruchira Sasanka91442282001-09-30 23:16:47 +0000338 // First color the return value of the call.
339 // If there is a LR for the return value, it means this
340 // method returns a value
341
342 MachineInstr *AdMI;
Chris Lattner20b1ea02001-09-14 03:47:57 +0000343
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000344 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
345 unsigned NumOfCallArgs = NumOfImpRefs; // assume all implicits are args
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000346
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000347 if( NumOfImpRefs > 0 ) {
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000348
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000349 // The last implicit operand is the return value of a call
350 if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) ) {
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000351
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000352 // one less call arg since last implicit ref is the return value
353 NumOfCallArgs--;
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000354
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000355 // find the return value and its LR
356 const Value *RetVal = CallMI->getImplicitRef(NumOfImpRefs-1);
357 LiveRange * RetValLR = LRI.getLiveRangeForValue( RetVal );
Ruchira Sasanka91442282001-09-30 23:16:47 +0000358
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000359 if( !RetValLR ) {
Chris Lattner1e23ed72001-10-15 18:15:27 +0000360 cerr << "\nNo LR for:";
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000361 printValue( RetVal );
Chris Lattner1e23ed72001-10-15 18:15:27 +0000362 cerr << endl;
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000363 assert( RetValLR && "ERR:No LR for non-void return value");
364 //return;
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000365 }
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000366
367 bool recvSugColor = false;
368
369 if( RetValLR->hasSuggestedColor() && RetValLR->hasColor() )
370 if( RetValLR->getSuggestedColor() == RetValLR->getColor())
371 recvSugColor = true;
372
373 // if we didn't receive the suggested color for some reason,
374 // put copy instruction
375
376 if( !recvSugColor ) {
377
378 if( RetValLR->hasColor() ) {
379
380 unsigned RegType = getRegType( RetValLR );
381 unsigned RegClassID = (RetValLR->getRegClass())->getID();
382
383 unsigned
384 UniRetLRReg=getUnifiedRegNum(RegClassID,RetValLR->getColor());
385 unsigned UniRetReg = InvalidRegNum;
386
387 // find where we receive the return value depending on
388 // register class
389
390 if(RegClassID == IntRegClassID)
391 UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::o0);
392 else if(RegClassID == FloatRegClassID)
393 UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
394
395
396 AdMI = cpReg2RegMI(UniRetLRReg, UniRetReg, RegType );
397 CallAI->InstrnsAfter.push_back( AdMI );
398
399
400 } // if LR has color
401 else {
402
403 assert(0 && "LR of return value is splilled");
404 }
Ruchira Sasanka91442282001-09-30 23:16:47 +0000405
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000406
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000407 } // the LR didn't receive the suggested color
Ruchira Sasanka91442282001-09-30 23:16:47 +0000408
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000409 } // if there a return value
410
411 } // if there is an implicit arg for a return value
Ruchira Sasanka91442282001-09-30 23:16:47 +0000412
413
414
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000415 // Now color all args of the call instruction
Ruchira Sasanka91442282001-09-30 23:16:47 +0000416
Ruchira Sasanka91442282001-09-30 23:16:47 +0000417
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000418 for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
419
420 const Value *CallArg = CallMI->getImplicitRef(i);
421
Ruchira Sasanka91442282001-09-30 23:16:47 +0000422 // get the LR of call operand (parameter)
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000423 LiveRange *const LR = LRI.getLiveRangeForValue(CallArg);
Ruchira Sasanka91442282001-09-30 23:16:47 +0000424
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000425 unsigned RegType = getRegType( CallArg );
426 unsigned RegClassID = getRegClassIDOfValue( CallArg);
Ruchira Sasanka91442282001-09-30 23:16:47 +0000427
428 // find whether this argument is coming in a register (if not, on stack)
429
430 bool isArgInReg = false;
431 unsigned UniArgReg = InvalidRegNum;
432
433 if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
434 isArgInReg = true;
435 UniArgReg = getUnifiedRegNum(RegClassID, SparcIntRegOrder::o0 + argNo );
436 }
437 else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
438 isArgInReg = true;
439 UniArgReg = getUnifiedRegNum(RegClassID,
440 SparcFloatRegOrder::f0 + (argNo*2 + 1) );
441 }
442 else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
443 isArgInReg = true;
444 UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
Chris Lattner20b1ea02001-09-14 03:47:57 +0000445 }
Chris Lattner20b1ea02001-09-14 03:47:57 +0000446
Chris Lattner20b1ea02001-09-14 03:47:57 +0000447
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000448 // not possible to have a null LR since all args (even consts)
449 // must be defined before
450 if( !LR ) {
Ruchira Sasanka91442282001-09-30 23:16:47 +0000451 if( DEBUG_RA) {
Chris Lattner1e23ed72001-10-15 18:15:27 +0000452 cerr << " ERROR: In call instr, no LR for arg: " ;
453 printValue(CallArg); cerr << endl;
Ruchira Sasanka91442282001-09-30 23:16:47 +0000454 }
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000455 assert(0 && "NO LR for call arg");
456 // continue;
Ruchira Sasanka91442282001-09-30 23:16:47 +0000457 }
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000458
Ruchira Sasanka91442282001-09-30 23:16:47 +0000459
460 // if the LR received the suggested color, NOTHING to do
461
462 if( LR->hasSuggestedColor() && LR->hasColor() )
463 if( LR->getSuggestedColor() == LR->getColor() )
464 continue;
465
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000466
Ruchira Sasanka91442282001-09-30 23:16:47 +0000467 if( LR->hasColor() ) {
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000468
Ruchira Sasanka91442282001-09-30 23:16:47 +0000469 // We are here because though the LR is allocated a register, it
470 // was not allocated the suggested register. So, we have to copy %ix reg
471 // (or stack pos of arg) to the register it was colored with
472
473
474 unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
475
476 if( isArgInReg )
477 AdMI = cpReg2RegMI(UniLRReg, UniArgReg, RegType );
478
479 else
480 assert(0 && "TODO: Push an outgoing arg on stack");
481
482 // Now add the instruction
483 CallAI->InstrnsBefore.push_back( AdMI );
484
485 }
486
487 else { // LR is not colored (i.e., spilled)
488
489 assert(0 && "TODO: Copy a spilled call arg to an output reg ");
490
491 }
492
493 } // for each parameter in call instruction
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000494
495}
496
Ruchira Sasanka91442282001-09-30 23:16:47 +0000497//---------------------------------------------------------------------------
498// This method is called for an LLVM return instruction to identify which
499// values will be returned from this method and to suggest colors.
500//---------------------------------------------------------------------------
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000501void UltraSparcRegInfo::suggestReg4RetValue(const MachineInstr *const RetMI,
Ruchira Sasanka91442282001-09-30 23:16:47 +0000502 LiveRangeInfo& LRI) const {
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000503
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000504 assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) );
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000505
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000506
507 suggestReg4RetAddr(RetMI, LRI);
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000508
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000509 // if there is an implicit ref, that has to be the ret value
510 if( RetMI->getNumImplicitRefs() > 0 ) {
Ruchira Sasanka91442282001-09-30 23:16:47 +0000511
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000512 // The first implicit operand is the return value of a return instr
513 const Value *RetVal = RetMI->getImplicitRef(0);
Ruchira Sasanka91442282001-09-30 23:16:47 +0000514
515 MachineInstr *AdMI;
516 LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
Ruchira Sasanka91442282001-09-30 23:16:47 +0000517
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000518 if( !LR ) {
Chris Lattner1e23ed72001-10-15 18:15:27 +0000519 cerr << "\nNo LR for:";
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000520 printValue( RetVal );
Chris Lattner1e23ed72001-10-15 18:15:27 +0000521 cerr << endl;
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000522 assert( LR && "No LR for return value of non-void method");
523 //return;
524 }
Ruchira Sasanka91442282001-09-30 23:16:47 +0000525
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000526 unsigned RegClassID = (LR->getRegClass())->getID();
Ruchira Sasanka91442282001-09-30 23:16:47 +0000527
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000528 if( RegClassID == IntRegClassID )
529 LR->setSuggestedColor(SparcIntRegOrder::i0);
530
531 else if ( RegClassID == FloatRegClassID )
532 LR->setSuggestedColor(SparcFloatRegOrder::f0);
Ruchira Sasanka91442282001-09-30 23:16:47 +0000533
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000534 }
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000535
Ruchira Sasanka91442282001-09-30 23:16:47 +0000536}
537
538//---------------------------------------------------------------------------
539
540//---------------------------------------------------------------------------
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000541void UltraSparcRegInfo::colorRetValue(const MachineInstr *const RetMI,
Ruchira Sasanka91442282001-09-30 23:16:47 +0000542 LiveRangeInfo& LRI,
543 AddedInstrns *const RetAI) const {
544
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000545 assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) );
Ruchira Sasanka91442282001-09-30 23:16:47 +0000546
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000547 // if there is an implicit ref, that has to be the ret value
548 if( RetMI->getNumImplicitRefs() > 0 ) {
Ruchira Sasanka91442282001-09-30 23:16:47 +0000549
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000550 // The first implicit operand is the return value of a return instr
551 const Value *RetVal = RetMI->getImplicitRef(0);
Ruchira Sasanka91442282001-09-30 23:16:47 +0000552
553 MachineInstr *AdMI;
554 LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
555
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000556 if( ! LR ) {
Chris Lattner1e23ed72001-10-15 18:15:27 +0000557 cerr << "\nNo LR for:";
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000558 printValue( RetVal );
Chris Lattner1e23ed72001-10-15 18:15:27 +0000559 cerr << endl;
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000560 // assert( LR && "No LR for return value of non-void method");
561 return;
562 }
563
Ruchira Sasanka91442282001-09-30 23:16:47 +0000564 unsigned RegClassID = getRegClassIDOfValue(RetVal);
565 unsigned RegType = getRegType( RetVal );
566 unsigned UniRetReg = InvalidRegNum;
567
568 if(RegClassID == IntRegClassID)
569 UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0 );
570 else if(RegClassID == FloatRegClassID)
571 UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
572
Ruchira Sasanka91442282001-09-30 23:16:47 +0000573
Ruchira Sasanka91442282001-09-30 23:16:47 +0000574
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000575 // if the LR received the suggested color, NOTHING to do
Ruchira Sasanka91442282001-09-30 23:16:47 +0000576
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000577 if( LR->hasSuggestedColor() && LR->hasColor() )
578 if( LR->getSuggestedColor() == LR->getColor() )
579 return;
Ruchira Sasanka91442282001-09-30 23:16:47 +0000580
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000581 if( LR->hasColor() ) {
Ruchira Sasanka91442282001-09-30 23:16:47 +0000582
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000583 // We are here because the LR was allocted a regiter, but NOT
584 // the correct register.
Ruchira Sasanka91442282001-09-30 23:16:47 +0000585
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000586 // copy the LR of retun value to i0 or f0
Ruchira Sasanka91442282001-09-30 23:16:47 +0000587
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000588 unsigned UniLRReg =getUnifiedRegNum( RegClassID, LR->getColor());
Ruchira Sasanka91442282001-09-30 23:16:47 +0000589
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000590 if(RegClassID == IntRegClassID)
591 UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0);
592 else if(RegClassID == FloatRegClassID)
593 UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
594
595 AdMI = cpReg2RegMI( UniLRReg, UniRetReg, RegType);
Ruchira Sasanka91442282001-09-30 23:16:47 +0000596
Ruchira Sasanka91442282001-09-30 23:16:47 +0000597 }
Ruchira Sasankacc3ccac2001-10-15 16:25:28 +0000598 else
599 assert(0 && "TODO: Copy the return value from stack\n");
Ruchira Sasanka91442282001-09-30 23:16:47 +0000600
601 } // if there is a return value
602
603}
604
605
606//---------------------------------------------------------------------------
607// Copy from a register to register. Register number must be the unified
608// register number
609//---------------------------------------------------------------------------
610
611
612MachineInstr * UltraSparcRegInfo::cpReg2RegMI(const unsigned SrcReg,
613 const unsigned DestReg,
614 const int RegType) const {
615
616 assert( (SrcReg != InvalidRegNum) && (DestReg != InvalidRegNum) &&
617 "Invalid Register");
618
619 MachineInstr * MI = NULL;
620
621 switch( RegType ) {
622
623 case IntRegType:
624 MI = new MachineInstr(ADD, 3);
625 MI->SetMachineOperand(0, SrcReg, false);
626 MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
627 MI->SetMachineOperand(2, DestReg, true);
628 break;
629
630 case FPSingleRegType:
631 MI = new MachineInstr(FMOVS, 2);
632 MI->SetMachineOperand(0, SrcReg, false);
633 MI->SetMachineOperand(1, DestReg, true);
634 break;
635
636 case FPDoubleRegType:
637 MI = new MachineInstr(FMOVD, 2);
638 MI->SetMachineOperand(0, SrcReg, false);
639 MI->SetMachineOperand(1, DestReg, true);
640 break;
641
642 default:
643 assert(0 && "Unknow RegType");
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000644 }
645
646 return MI;
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000647}
Chris Lattner20b1ea02001-09-14 03:47:57 +0000648
649
Ruchira Sasanka91442282001-09-30 23:16:47 +0000650
651
652//---------------------------------------------------------------------------
653// Only constant/label values are accepted.
654// ***This code is temporary ***
655//---------------------------------------------------------------------------
656
657
658MachineInstr * UltraSparcRegInfo::cpValue2RegMI(Value * Val,
659 const unsigned DestReg,
660 const int RegType) const {
661
662 assert( (DestReg != InvalidRegNum) && "Invalid Register");
663
664 /*
665 unsigned MReg;
666 int64_t Imm;
667
668 MachineOperand::MachineOperandType MOTypeInt =
669 ChooseRegOrImmed(Val, ADD, *UltraSparcInfo, true, MReg, Imm);
670 */
671
672 MachineOperand::MachineOperandType MOType;
673
674 switch( Val->getValueType() ) {
675
676 case Value::ConstantVal:
Chris Lattneref9c23f2001-10-03 14:53:21 +0000677 case Value::GlobalVariableVal:
Ruchira Sasanka91442282001-09-30 23:16:47 +0000678 MOType = MachineOperand:: MO_UnextendedImmed; // TODO**** correct???
679 break;
680
681 case Value::BasicBlockVal:
682 case Value::MethodVal:
683 MOType = MachineOperand::MO_PCRelativeDisp;
684 break;
685
686 default:
Chris Lattner1e23ed72001-10-15 18:15:27 +0000687 cerr << "Value Type: " << Val->getValueType() << endl;
Ruchira Sasanka91442282001-09-30 23:16:47 +0000688 assert(0 && "Unknown val type - Only constants/globals/labels are valid");
689 }
690
691
692
693 MachineInstr * MI = NULL;
694
695 switch( RegType ) {
696
697 case IntRegType:
698 MI = new MachineInstr(ADD);
699 MI->SetMachineOperand(0, MOType, Val, false);
700 MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
701 MI->SetMachineOperand(2, DestReg, true);
702 break;
703
704 case FPSingleRegType:
705 assert(0 && "FP const move not yet implemented");
706 MI = new MachineInstr(FMOVS);
707 MI->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, Val, false);
708 MI->SetMachineOperand(1, DestReg, true);
709 break;
710
711 case FPDoubleRegType:
712 assert(0 && "FP const move not yet implemented");
713 MI = new MachineInstr(FMOVD);
714 MI->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, Val, false);
715 MI->SetMachineOperand(1, DestReg, true);
716 break;
717
718 default:
719 assert(0 && "Unknow RegType");
720 }
721
722 return MI;
723}
724
725
726
727
728
729
730
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000731//---------------------------------------------------------------------------
732// Print the register assigned to a LR
733//---------------------------------------------------------------------------
734
735void UltraSparcRegInfo::printReg(const LiveRange *const LR) {
736
737 unsigned RegClassID = (LR->getRegClass())->getID();
738
Chris Lattner1e23ed72001-10-15 18:15:27 +0000739 cerr << " *Node " << (LR->getUserIGNode())->getIndex();
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000740
741 if( ! LR->hasColor() ) {
Chris Lattner1e23ed72001-10-15 18:15:27 +0000742 cerr << " - could not find a color" << endl;
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000743 return;
744 }
745
746 // if a color is found
747
Chris Lattner1e23ed72001-10-15 18:15:27 +0000748 cerr << " colored with color "<< LR->getColor();
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000749
750 if( RegClassID == IntRegClassID ) {
751
Chris Lattner1e23ed72001-10-15 18:15:27 +0000752 cerr<< " [" << SparcIntRegOrder::getRegName(LR->getColor()) ;
753 cerr << "]" << endl;
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000754 }
755 else if ( RegClassID == FloatRegClassID) {
Chris Lattner1e23ed72001-10-15 18:15:27 +0000756 cerr << "[" << SparcFloatRegOrder::getRegName(LR->getColor());
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000757 if( LR->getTypeID() == Type::DoubleTyID )
Chris Lattner1e23ed72001-10-15 18:15:27 +0000758 cerr << "+" << SparcFloatRegOrder::getRegName(LR->getColor()+1);
759 cerr << "]" << endl;
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000760 }
Ruchira Sasanka89fb46b2001-09-18 22:52:44 +0000761}