blob: a9eb62387b52be2bb1dc4d7a971b64779adfcd09 [file] [log] [blame]
Jakob Stoklund Olesen1f25fe52013-04-06 18:32:12 +00001; RUN: llc < %s -march=sparcv9 | FileCheck %s
2
3; CHECK: intarg
4; CHECK: stb %i0, [%i4]
5; CHECK: stb %i1, [%i4]
6; CHECK: sth %i2, [%i4]
7; CHECK: st %i3, [%i4]
8; CHECK: stx %i4, [%i4]
9; CHECK: st %i5, [%i4]
10; FIXME: Stack bias
11; CHECK: ld [%fp+180], [[R:%[gilo][0-7]]]
12; CHECK: st [[R]], [%i4]
13; CHECK: ldx [%fp+184], [[R:%[gilo][0-7]]]
14; CHECK: stx [[R]], [%i4]
15define void @intarg(i8 %a0, ; %i0
16 i8 %a1, ; %i1
17 i16 %a2, ; %i2
18 i32 %a3, ; %i3
19 i8* %a4, ; %i4
20 i32 %a5, ; %i5
21 i32 %a6, ; [%fp+BIAS+176]
22 i8* %a7) { ; [%fp+BIAS+184]
23 store i8 %a0, i8* %a4
24 store i8 %a1, i8* %a4
25 %p16 = bitcast i8* %a4 to i16*
26 store i16 %a2, i16* %p16
27 %p32 = bitcast i8* %a4 to i32*
28 store i32 %a3, i32* %p32
29 %pp = bitcast i8* %a4 to i8**
30 store i8* %a4, i8** %pp
31 store i32 %a5, i32* %p32
32 store i32 %a6, i32* %p32
33 store i8* %a7, i8** %pp
34 ret void
35}
36
37; CHECK: floatarg
38; CHECK: fstod %f1,
39; CHECK: faddd %f2,
40; CHECK: faddd %f4,
41; CHECK: faddd %f6,
42; FIXME: Stack bias
43; CHECK: ld [%fp+260], [[F:%f[0-9]+]]
44; CHECK: fadds %f31, [[F]]
45define double @floatarg(float %a0, ; %f1
46 double %a1, ; %d2
47 double %a2, ; %d4
48 double %a3, ; %d6
49 float %a4, ; %f9
50 float %a5, ; %f11
51 float %a6, ; %f13
52 float %a7, ; %f15
53 float %a8, ; %f17
54 float %a9, ; %f19
55 float %a10, ; %f21
56 float %a11, ; %f23
57 float %a12, ; %f25
58 float %a13, ; %f27
59 float %a14, ; %f29
60 float %a15, ; %f31
61 float %a16, ; [%fp+BIAS+256] (using 8 bytes)
62 float %a17) { ; [%fp+BIAS+264] (using 8 bytes)
63 %d0 = fpext float %a0 to double
64 %s1 = fadd double %a1, %d0
65 %s2 = fadd double %a2, %s1
66 %s3 = fadd double %a3, %s2
67 %s16 = fadd float %a15, %a16
68 %d16 = fpext float %s16 to double
69 %s17 = fadd double %d16, %s3
70 ret double %s17
71}
72
73; CHECK: mixedarg
74; CHECK: fstod %f3
75; CHECK: faddd %f6
76; CHECK: faddd %f16
77; CHECK: ldx [%fp+184]
78; CHECK: ldx [%fp+200]
79define void @mixedarg(i8 %a0, ; %i0
80 float %a1, ; %f3
81 i16 %a2, ; %i2
82 double %a3, ; %d6
83 i13 %a4, ; %i4
84 float %a5, ; %f11
85 i64 %a6, ; [%fp+BIAS+176]
86 double *%a7, ; [%fp+BIAS+184]
87 double %a8, ; %d16
88 i16* %a9) { ; [%fp+BIAS+200]
89 %d1 = fpext float %a1 to double
90 %s3 = fadd double %a3, %d1
91 %s8 = fadd double %a8, %s3
92 store double %s8, double* %a7
93 store i16 %a2, i16* %a9
94 ret void
95}
96
97; The inreg attribute is used to indicate 32-bit sized struct elements that
98; share an 8-byte slot.
99; CHECK: inreg_fi
100; CHECK: fstoi %f1
101; CHECK: srlx %i0, 32, [[R:%[gilo][0-7]]]
102; CHECK: sub [[R]],
103define i32 @inreg_fi(i32 inreg %a0, ; high bits of %i0
104 float inreg %a1) { ; %f1
105 %b1 = fptosi float %a1 to i32
106 %rv = sub i32 %a0, %b1
107 ret i32 %rv
108}
109
110; CHECK: inreg_ff
111; CHECK: fsubs %f0, %f1, %f1
112define float @inreg_ff(float inreg %a0, ; %f0
113 float inreg %a1) { ; %f1
114 %rv = fsub float %a0, %a1
115 ret float %rv
116}
117
118; CHECK: inreg_if
119; CHECK: fstoi %f0
120; CHECK: sub %i0
121define i32 @inreg_if(float inreg %a0, ; %f0
122 i32 inreg %a1) { ; low bits of %i0
123 %b0 = fptosi float %a0 to i32
124 %rv = sub i32 %a1, %b0
125 ret i32 %rv
126}
127
128; The frontend shouldn't do this. Just pass i64 instead.
129; CHECK: inreg_ii
130; CHECK: srlx %i0, 32, [[R:%[gilo][0-7]]]
131; CHECK: sub %i0, [[R]], %i0
132define i32 @inreg_ii(i32 inreg %a0, ; high bits of %i0
133 i32 inreg %a1) { ; low bits of %i0
134 %rv = sub i32 %a1, %a0
135 ret i32 %rv
136}