| Bob Wilson | 205a5ca | 2009-07-08 18:11:30 +0000 | [diff] [blame^] | 1 | ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t |
| 2 | ; RUN: grep {vld1\\.8} %t | count 2 |
| 3 | ; RUN: grep {vld1\\.16} %t | count 2 |
| 4 | ; RUN: grep {vld1\\.32} %t | count 4 |
| 5 | ; RUN: grep {vld1\\.64} %t | count 2 |
| 6 | |
| 7 | define <8 x i8> @vld1i8(i8* %A) nounwind { |
| 8 | %tmp1 = call <8 x i8> @llvm.arm.neon.vldi.v8i8(i8* %A, i32 1) |
| 9 | ret <8 x i8> %tmp1 |
| 10 | } |
| 11 | |
| 12 | define <4 x i16> @vld1i16(i16* %A) nounwind { |
| 13 | %tmp1 = call <4 x i16> @llvm.arm.neon.vldi.v4i16(i16* %A, i32 1) |
| 14 | ret <4 x i16> %tmp1 |
| 15 | } |
| 16 | |
| 17 | define <2 x i32> @vld1i32(i32* %A) nounwind { |
| 18 | %tmp1 = call <2 x i32> @llvm.arm.neon.vldi.v2i32(i32* %A, i32 1) |
| 19 | ret <2 x i32> %tmp1 |
| 20 | } |
| 21 | |
| 22 | define <2 x float> @vld1f(float* %A) nounwind { |
| 23 | %tmp1 = call <2 x float> @llvm.arm.neon.vldf.v2f32(float* %A, i32 1) |
| 24 | ret <2 x float> %tmp1 |
| 25 | } |
| 26 | |
| 27 | define <1 x i64> @vld1i64(i64* %A) nounwind { |
| 28 | %tmp1 = call <1 x i64> @llvm.arm.neon.vldi.v1i64(i64* %A, i32 1) |
| 29 | ret <1 x i64> %tmp1 |
| 30 | } |
| 31 | |
| 32 | define <16 x i8> @vld1Qi8(i8* %A) nounwind { |
| 33 | %tmp1 = call <16 x i8> @llvm.arm.neon.vldi.v16i8(i8* %A, i32 1) |
| 34 | ret <16 x i8> %tmp1 |
| 35 | } |
| 36 | |
| 37 | define <8 x i16> @vld1Qi16(i16* %A) nounwind { |
| 38 | %tmp1 = call <8 x i16> @llvm.arm.neon.vldi.v8i16(i16* %A, i32 1) |
| 39 | ret <8 x i16> %tmp1 |
| 40 | } |
| 41 | |
| 42 | define <4 x i32> @vld1Qi32(i32* %A) nounwind { |
| 43 | %tmp1 = call <4 x i32> @llvm.arm.neon.vldi.v4i32(i32* %A, i32 1) |
| 44 | ret <4 x i32> %tmp1 |
| 45 | } |
| 46 | |
| 47 | define <4 x float> @vld1Qf(float* %A) nounwind { |
| 48 | %tmp1 = call <4 x float> @llvm.arm.neon.vldf.v4f32(float* %A, i32 1) |
| 49 | ret <4 x float> %tmp1 |
| 50 | } |
| 51 | |
| 52 | define <2 x i64> @vld1Qi64(i64* %A) nounwind { |
| 53 | %tmp1 = call <2 x i64> @llvm.arm.neon.vldi.v2i64(i64* %A, i32 1) |
| 54 | ret <2 x i64> %tmp1 |
| 55 | } |
| 56 | |
| 57 | declare <8 x i8> @llvm.arm.neon.vldi.v8i8(i8*, i32) nounwind readnone |
| 58 | declare <4 x i16> @llvm.arm.neon.vldi.v4i16(i16*, i32) nounwind readnone |
| 59 | declare <2 x i32> @llvm.arm.neon.vldi.v2i32(i32*, i32) nounwind readnone |
| 60 | declare <2 x float> @llvm.arm.neon.vldf.v2f32(float*, i32) nounwind readnone |
| 61 | declare <1 x i64> @llvm.arm.neon.vldi.v1i64(i64*, i32) nounwind readnone |
| 62 | |
| 63 | declare <16 x i8> @llvm.arm.neon.vldi.v16i8(i8*, i32) nounwind readnone |
| 64 | declare <8 x i16> @llvm.arm.neon.vldi.v8i16(i16*, i32) nounwind readnone |
| 65 | declare <4 x i32> @llvm.arm.neon.vldi.v4i32(i32*, i32) nounwind readnone |
| 66 | declare <4 x float> @llvm.arm.neon.vldf.v4f32(float*, i32) nounwind readnone |
| 67 | declare <2 x i64> @llvm.arm.neon.vldi.v2i64(i64*, i32) nounwind readnone |