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Jia Liu31d157a2012-02-18 12:03:15 +00001//===- HexagonSchedule.td - Hexagon Scheduling Definitions -*- tablegen -*-===//
Tony Linthicumb4b54152011-12-12 21:14:40 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10// Functional Units
11def LUNIT : FuncUnit;
12def LSUNIT : FuncUnit;
13def MUNIT : FuncUnit;
14def SUNIT : FuncUnit;
15
Tony Linthicumb4b54152011-12-12 21:14:40 +000016// Itinerary classes
17def ALU32 : InstrItinClass;
18def ALU64 : InstrItinClass;
19def CR : InstrItinClass;
20def J : InstrItinClass;
21def JR : InstrItinClass;
22def LD : InstrItinClass;
23def M : InstrItinClass;
24def ST : InstrItinClass;
25def S : InstrItinClass;
Sirish Pande71d56462012-05-03 16:18:50 +000026def SYS : InstrItinClass;
27def MARKER : InstrItinClass;
Tony Linthicumb4b54152011-12-12 21:14:40 +000028def PSEUDO : InstrItinClass;
29
Tony Linthicumb4b54152011-12-12 21:14:40 +000030def HexagonItineraries :
Sirish Pande71d56462012-05-03 16:18:50 +000031 ProcessorItineraries<[LUNIT, LSUNIT, MUNIT, SUNIT], [], [
32 InstrItinData<ALU32 , [InstrStage<1, [LUNIT, LSUNIT, MUNIT, SUNIT]>]>,
33 InstrItinData<ALU64 , [InstrStage<1, [MUNIT, SUNIT]>]>,
34 InstrItinData<CR , [InstrStage<1, [SUNIT]>]>,
35 InstrItinData<J , [InstrStage<1, [SUNIT, MUNIT]>]>,
36 InstrItinData<JR , [InstrStage<1, [MUNIT]>]>,
37 InstrItinData<LD , [InstrStage<1, [LUNIT, LSUNIT]>]>,
38 InstrItinData<M , [InstrStage<1, [MUNIT, SUNIT]>]>,
39 InstrItinData<ST , [InstrStage<1, [LSUNIT]>]>,
40 InstrItinData<S , [InstrStage<1, [SUNIT, MUNIT]>]>,
41 InstrItinData<SYS , [InstrStage<1, [LSUNIT]>]>,
42 InstrItinData<MARKER , [InstrStage<1, [LUNIT, LSUNIT, MUNIT, SUNIT]>]>,
43 InstrItinData<PSEUDO , [InstrStage<1, [LUNIT, LSUNIT, MUNIT, SUNIT]>]>
Andrew Trick2661b412012-07-07 04:00:00 +000044 ]>;
45
46def HexagonModel : SchedMachineModel {
Andrew Trickfc992992012-06-05 03:44:40 +000047 // Max issue per cycle == bundle width.
48 let IssueWidth = 4;
Andrew Trick2661b412012-07-07 04:00:00 +000049 let Itineraries = HexagonItineraries;
Andrew Trickfc992992012-06-05 03:44:40 +000050}
Tony Linthicumb4b54152011-12-12 21:14:40 +000051
52//===----------------------------------------------------------------------===//
53// V4 Machine Info +
54//===----------------------------------------------------------------------===//
55
56include "HexagonScheduleV4.td"
57
58//===----------------------------------------------------------------------===//
59// V4 Machine Info -
60//===----------------------------------------------------------------------===//