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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 34c4485b7479a12b5ef1cb15d27e96277e8a499a / . / test / CodeGen / SPARC / 2011-01-11-CC.ll
blob: 3ceda958de6e48a4d195dc6655481f85225e0f91 [file] [log] [blame]
Venkatraman Govindarajue105a392011-01-22 11:36:24 +0000[diff] [blame]1; RUN: llc -march=sparc <%s | FileCheck %s -check-prefix=V8
2; RUN: llc -march=sparc -mattr=v9 <%s | FileCheck %s -check-prefix=V9
Venkatraman Govindarajuf27df332011-01-11 22:38:28 +0000[diff] [blame]3
4
5define i32 @test_addx(i64 %a, i64 %b, i64 %c) nounwind readnone noinline {
6entry:
Venkatraman Govindarajue105a392011-01-22 11:36:24 +0000[diff] [blame]7; V8: addcc
8; V8-NOT: subcc
9; V8: addx
10; V9: addcc
11; V9-NOT: subcc
12; V9: addx
13; V9: mov{{e|ne}} %icc
Venkatraman Govindarajuf27df332011-01-11 22:38:28 +0000[diff] [blame]14 %0 = add i64 %a, %b
15 %1 = icmp ugt i64 %0, %c
16 %2 = zext i1 %1 to i32
17 ret i32 %2
18}
19
20
21define i32 @test_select_int_icc(i32 %a, i32 %b, i32 %c) nounwind readnone noinline {
22entry:
Venkatraman Govindarajue105a392011-01-22 11:36:24 +0000[diff] [blame]23; V8: test_select_int_icc
24; V8: subcc
25; V8: {{be|bne}}
26; V9: test_select_int_icc
27; V9: subcc
28; V9-NOT: {{be|bne}}
29; V9: mov{{e|ne}} %icc
Venkatraman Govindarajuf27df332011-01-11 22:38:28 +0000[diff] [blame]30 %0 = icmp eq i32 %a, 0
31 %1 = select i1 %0, i32 %b, i32 %c
32 ret i32 %1
33}
34
35
36define float @test_select_fp_icc(i32 %a, float %f1, float %f2) nounwind readnone noinline {
37entry:
Venkatraman Govindarajue105a392011-01-22 11:36:24 +0000[diff] [blame]38; V8: test_select_fp_icc
39; V8: subcc
40; V8: {{be|bne}}
41; V9: test_select_fp_icc
42; V9: subcc
43; V9-NOT: {{be|bne}}
44; V9: fmovs{{e|ne}} %icc
Venkatraman Govindarajuf27df332011-01-11 22:38:28 +0000[diff] [blame]45 %0 = icmp eq i32 %a, 0
46 %1 = select i1 %0, float %f1, float %f2
47 ret float %1
48}
49
50define double @test_select_dfp_icc(i32 %a, double %f1, double %f2) nounwind readnone noinline {
51entry:
Venkatraman Govindarajue105a392011-01-22 11:36:24 +0000[diff] [blame]52; V8: test_select_dfp_icc
53; V8: subcc
54; V8: {{be|bne}}
55; V9: test_select_dfp_icc
56; V9: subcc
57; V9=NOT: {{be|bne}}
58; V9: fmovd{{e|ne}} %icc
Venkatraman Govindarajuf27df332011-01-11 22:38:28 +0000[diff] [blame]59 %0 = icmp eq i32 %a, 0
60 %1 = select i1 %0, double %f1, double %f2
61 ret double %1
62}
63
64define i32 @test_select_int_fcc(float %f, i32 %a, i32 %b) nounwind readnone noinline {
65entry:
Venkatraman Govindarajue105a392011-01-22 11:36:24 +0000[diff] [blame]66;V8: test_select_int_fcc
67;V8: fcmps
68;V8: {{fbe|fbne}}
69;V9: test_select_int_fcc
70;V9: fcmps
71;V9-NOT: {{fbe|fbne}}
72;V9: mov{{e|ne}} %fcc0
Venkatraman Govindarajuf27df332011-01-11 22:38:28 +0000[diff] [blame]73 %0 = fcmp une float %f, 0.000000e+00
74 %a.b = select i1 %0, i32 %a, i32 %b
75 ret i32 %a.b
76}
77
78
79define float @test_select_fp_fcc(float %f, float %f1, float %f2) nounwind readnone noinline {
80entry:
Venkatraman Govindarajue105a392011-01-22 11:36:24 +0000[diff] [blame]81;V8: test_select_fp_fcc
82;V8: fcmps
83;V8: {{fbe|fbne}}
84;V9: test_select_fp_fcc
85;V9: fcmps
86;V9-NOT: {{fbe|fbne}}
87;V9: fmovs{{e|ne}} %fcc0
Venkatraman Govindarajuf27df332011-01-11 22:38:28 +0000[diff] [blame]88 %0 = fcmp une float %f, 0.000000e+00
89 %1 = select i1 %0, float %f1, float %f2
90 ret float %1
91}
92
93define double @test_select_dfp_fcc(double %f, double %f1, double %f2) nounwind readnone noinline {
94entry:
Venkatraman Govindarajue105a392011-01-22 11:36:24 +0000[diff] [blame]95;V8: test_select_dfp_fcc
96;V8: fcmpd
97;V8: {{fbne|fbe}}
98;V9: test_select_dfp_fcc
99;V9: fcmpd
100;V9-NOT: {{fbne|fbe}}
101;V9: fmovd{{e|ne}} %fcc0
Venkatraman Govindarajuf27df332011-01-11 22:38:28 +0000[diff] [blame]102 %0 = fcmp une double %f, 0.000000e+00
103 %1 = select i1 %0, double %f1, double %f2
104 ret double %1
105}