blob: 1d44b526d2986b93e41593cee5d7e95c20506d7e [file] [log] [blame]
Sirish Pande81e900d2012-05-11 19:39:13 +00001class sf_SInst_sf<string opc, Intrinsic IntID>
2 : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1),
3 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
4 [(set IntRegs:$dst, (IntID IntRegs:$src1))]>;
5
6class si_SInst_sf<string opc, Intrinsic IntID>
7 : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1),
8 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
9 [(set IntRegs:$dst, (IntID IntRegs:$src1))]>;
10
11class sf_SInst_si<string opc, Intrinsic IntID>
12 : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1),
13 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
14 [(set IntRegs:$dst, (IntID IntRegs:$src1))]>;
15
16class sf_SInst_di<string opc, Intrinsic IntID>
17 : SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1),
18 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
19 [(set IntRegs:$dst, (IntID DoubleRegs:$src1))]>;
20
21class sf_SInst_df<string opc, Intrinsic IntID>
22 : SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1),
23 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
24 [(set IntRegs:$dst, (IntID DoubleRegs:$src1))]>;
25
26class si_SInst_df<string opc, Intrinsic IntID>
27 : SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1),
28 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
29 [(set IntRegs:$dst, (IntID DoubleRegs:$src1))]>;
30
31class df_SInst_sf<string opc, Intrinsic IntID>
32 : SInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1),
33 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
34 [(set DoubleRegs:$dst, (IntID IntRegs:$src1))]>;
35
36class di_SInst_sf<string opc, Intrinsic IntID>
37 : SInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1),
38 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
39 [(set DoubleRegs:$dst, (IntID IntRegs:$src1))]>;
40
41class df_SInst_si<string opc, Intrinsic IntID>
42 : SInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1),
43 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
44 [(set DoubleRegs:$dst, (IntID IntRegs:$src1))]>;
45
46class df_SInst_df<string opc, Intrinsic IntID>
47 : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1),
48 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
49 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1))]>;
50
51class di_SInst_df<string opc, Intrinsic IntID>
52 : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1),
53 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
54 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1))]>;
55
56
57class df_SInst_di<string opc, Intrinsic IntID>
58 : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1),
59 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
60 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1))]>;
61
62class sf_MInst_sfsf<string opc, Intrinsic IntID>
63 : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
64 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
65 [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>;
66
67class df_MInst_dfdf<string opc, Intrinsic IntID>
68 : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2),
69 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
70 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>;
71
72class qi_ALU64_dfdf<string opc, Intrinsic IntID>
73 : ALU64_rr<(outs PredRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2),
74 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
75 [(set PredRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>;
76
77class qi_ALU64_dfu5<string opc, Intrinsic IntID>
78 : ALU64_ri<(outs PredRegs:$dst), (ins DoubleRegs:$src1, u5Imm:$src2),
79 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
80 [(set PredRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>;
81
82
83class sf_MInst_sfsfsf_acc<string opc, Intrinsic IntID>
84 : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2,
85 IntRegs:$dst2),
86 !strconcat("$dst += ", !strconcat(opc ,
87 "($src1, $src2)")),
88 [(set IntRegs:$dst, (IntID IntRegs:$src1,
89 IntRegs:$src2, IntRegs:$dst2))],
90 "$dst2 = $dst">;
91
92class sf_MInst_sfsfsf_nac<string opc, Intrinsic IntID>
93 : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2,
94 IntRegs:$dst2),
95 !strconcat("$dst -= ", !strconcat(opc ,
96 "($src1, $src2)")),
97 [(set IntRegs:$dst, (IntID IntRegs:$src1,
98 IntRegs:$src2, IntRegs:$dst2))],
99 "$dst2 = $dst">;
100
101
102class sf_MInst_sfsfsfsi_sc<string opc, Intrinsic IntID>
103 : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1,
104 IntRegs:$src2, IntRegs:$src3),
105 !strconcat("$dst += ", !strconcat(opc ,
106 "($src1, $src2, $src3):scale")),
107 [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1,
108 IntRegs:$src2, IntRegs:$src3))],
109 "$dst2 = $dst">;
110
111class sf_MInst_sfsfsf_acc_lib<string opc, Intrinsic IntID>
112 : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2,
113 IntRegs:$dst2),
114 !strconcat("$dst += ", !strconcat(opc ,
115 "($src1, $src2):lib")),
116 [(set IntRegs:$dst, (IntID IntRegs:$src1,
117 IntRegs:$src2, IntRegs:$dst2))],
118 "$dst2 = $dst">;
119
120class sf_MInst_sfsfsf_nac_lib<string opc, Intrinsic IntID>
121 : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2,
122 IntRegs:$dst2),
123 !strconcat("$dst -= ", !strconcat(opc ,
124 "($src1, $src2):lib")),
125 [(set IntRegs:$dst, (IntID IntRegs:$src1,
126 IntRegs:$src2, IntRegs:$dst2))],
127 "$dst2 = $dst">;
128
129class df_MInst_dfdfdf_acc<string opc, Intrinsic IntID>
130 : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2,
131 DoubleRegs:$dst2),
132 !strconcat("$dst += ", !strconcat(opc ,
133 "($src1, $src2)")),
134 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1,
135 DoubleRegs:$src2, DoubleRegs:$dst2))],
136 "$dst2 = $dst">;
137
138class df_MInst_dfdfdf_nac<string opc, Intrinsic IntID>
139 : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2,
140 DoubleRegs:$dst2),
141 !strconcat("$dst -= ", !strconcat(opc ,
142 "($src1, $src2)")),
143 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1,
144 DoubleRegs:$src2, DoubleRegs:$dst2))],
145 "$dst2 = $dst">;
146
147
148class df_MInst_dfdfdfsi_sc<string opc, Intrinsic IntID>
149 : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1,
150 DoubleRegs:$src2, IntRegs:$src3),
151 !strconcat("$dst += ", !strconcat(opc ,
152 "($src1, $src2, $src3):scale")),
153 [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, DoubleRegs:$src1,
154 DoubleRegs:$src2, IntRegs:$src3))],
155 "$dst2 = $dst">;
156
157class df_MInst_dfdfdf_acc_lib<string opc, Intrinsic IntID>
158 : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2,
159 DoubleRegs:$dst2),
160 !strconcat("$dst += ", !strconcat(opc ,
161 "($src1, $src2):lib")),
162 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1,
163 DoubleRegs:$src2, DoubleRegs:$dst2))],
164 "$dst2 = $dst">;
165
166class df_MInst_dfdfdf_nac_lib<string opc, Intrinsic IntID>
167 : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2,
168 DoubleRegs:$dst2),
169 !strconcat("$dst -= ", !strconcat(opc ,
170 "($src1, $src2):lib")),
171 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1,
172 DoubleRegs:$src2, DoubleRegs:$dst2))],
173 "$dst2 = $dst">;
174
175class qi_SInst_sfsf<string opc, Intrinsic IntID>
176 : SInst<(outs PredRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
177 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
178 [(set PredRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>;
179
180class qi_SInst_sfu5<string opc, Intrinsic IntID>
181 : MInst<(outs PredRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2),
182 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
183 [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>;
184
185class sf_ALU64_u10_pos<string opc, Intrinsic IntID>
186 : ALU64_ri<(outs IntRegs:$dst), (ins u10Imm:$src1),
187 !strconcat("$dst = ", !strconcat(opc , "#$src1):pos")),
188 [(set IntRegs:$dst, (IntID imm:$src1))]>;
189
190class sf_ALU64_u10_neg<string opc, Intrinsic IntID>
191 : ALU64_ri<(outs IntRegs:$dst), (ins u10Imm:$src1),
192 !strconcat("$dst = ", !strconcat(opc , "#$src1):neg")),
193 [(set IntRegs:$dst, (IntID imm:$src1))]>;
194
195class df_ALU64_u10_pos<string opc, Intrinsic IntID>
196 : ALU64_ri<(outs DoubleRegs:$dst), (ins u10Imm:$src1),
197 !strconcat("$dst = ", !strconcat(opc , "#$src1):pos")),
198 [(set DoubleRegs:$dst, (IntID imm:$src1))]>;
199
200class df_ALU64_u10_neg<string opc, Intrinsic IntID>
201 : ALU64_ri<(outs DoubleRegs:$dst), (ins u10Imm:$src1),
202 !strconcat("$dst = ", !strconcat(opc , "#$src1):neg")),
203 [(set DoubleRegs:$dst, (IntID imm:$src1))]>;
204
205class di_MInst_diu6<string opc, Intrinsic IntID>
206 : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, u6Imm:$src2),
207 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
208 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>;
209
210class di_MInst_diu4_rnd<string opc, Intrinsic IntID>
211 : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, u4Imm:$src2),
212 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2):rnd")),
213 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>;
214
215class si_MInst_diu4_rnd_sat<string opc, Intrinsic IntID>
216 : MInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1, u4Imm:$src2),
217 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2):rnd:sat")),
218 [(set IntRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>;
219
220class si_SInst_diu4_sat<string opc, Intrinsic IntID>
221 : SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1, u4Imm:$src2),
222 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2):sat")),
223 [(set IntRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>;
224
225
226def HEXAGON_C4_fastcorner9:
Bill Wendling0818e712012-07-19 00:25:04 +0000227 qi_SInst_qiqi <"fastcorner9", int_hexagon_C4_fastcorner9>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000228def HEXAGON_C4_fastcorner9_not:
Bill Wendling0818e712012-07-19 00:25:04 +0000229 qi_SInst_qiqi <"!fastcorner9", int_hexagon_C4_fastcorner9_not>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000230def HEXAGON_M5_vrmpybuu:
Bill Wendling0818e712012-07-19 00:25:04 +0000231 di_MInst_didi <"vrmpybu", int_hexagon_M5_vrmpybuu>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000232def HEXAGON_M5_vrmacbuu:
Bill Wendling0818e712012-07-19 00:25:04 +0000233 di_MInst_dididi_acc <"vrmpybu", int_hexagon_M5_vrmacbuu>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000234def HEXAGON_M5_vrmpybsu:
Bill Wendling0818e712012-07-19 00:25:04 +0000235 di_MInst_didi <"vrmpybsu", int_hexagon_M5_vrmpybsu>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000236def HEXAGON_M5_vrmacbsu:
Bill Wendling0818e712012-07-19 00:25:04 +0000237 di_MInst_dididi_acc <"vrmpybsu", int_hexagon_M5_vrmacbsu>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000238def HEXAGON_M5_vmpybuu:
Bill Wendling0818e712012-07-19 00:25:04 +0000239 di_MInst_sisi <"vmpybu", int_hexagon_M5_vmpybuu>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000240def HEXAGON_M5_vmpybsu:
Bill Wendling0818e712012-07-19 00:25:04 +0000241 di_MInst_sisi <"vmpybsu", int_hexagon_M5_vmpybsu>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000242def HEXAGON_M5_vmacbuu:
Bill Wendling0818e712012-07-19 00:25:04 +0000243 di_MInst_disisi_acc <"vmpybu", int_hexagon_M5_vmacbuu>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000244def HEXAGON_M5_vmacbsu:
Bill Wendling0818e712012-07-19 00:25:04 +0000245 di_MInst_disisi_acc <"vmpybsu", int_hexagon_M5_vmacbsu>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000246def HEXAGON_M5_vdmpybsu:
Bill Wendling0818e712012-07-19 00:25:04 +0000247 di_MInst_didi_sat <"vdmpybsu", int_hexagon_M5_vdmpybsu>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000248def HEXAGON_M5_vdmacbsu:
Bill Wendling0818e712012-07-19 00:25:04 +0000249 di_MInst_dididi_acc_sat <"vdmpybsu", int_hexagon_M5_vdmacbsu>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000250def HEXAGON_A5_vaddhubs:
Bill Wendling0818e712012-07-19 00:25:04 +0000251 si_SInst_didi_sat <"vaddhub", int_hexagon_A5_vaddhubs>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000252def HEXAGON_S5_popcountp:
Bill Wendling0818e712012-07-19 00:25:04 +0000253 si_SInst_di <"popcount", int_hexagon_S5_popcountp>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000254def HEXAGON_S5_asrhub_rnd_sat_goodsyntax:
Bill Wendling0818e712012-07-19 00:25:04 +0000255 si_MInst_diu4_rnd_sat <"vasrhub", int_hexagon_S5_asrhub_rnd_sat_goodsyntax>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000256def HEXAGON_S5_asrhub_sat:
Bill Wendling0818e712012-07-19 00:25:04 +0000257 si_SInst_diu4_sat <"vasrhub", int_hexagon_S5_asrhub_sat>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000258def HEXAGON_S5_vasrhrnd_goodsyntax:
Bill Wendling0818e712012-07-19 00:25:04 +0000259 di_MInst_diu4_rnd <"vasrh", int_hexagon_S5_vasrhrnd_goodsyntax>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000260def HEXAGON_S2_asr_i_p_rnd:
Bill Wendling0818e712012-07-19 00:25:04 +0000261 di_SInst_diu6 <"asr", int_hexagon_S2_asr_i_p_rnd>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000262def HEXAGON_S2_asr_i_p_rnd_goodsyntax:
Bill Wendling0818e712012-07-19 00:25:04 +0000263 di_MInst_diu6 <"asrrnd", int_hexagon_S2_asr_i_p_rnd_goodsyntax>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000264def HEXAGON_F2_sfadd:
Bill Wendling0818e712012-07-19 00:25:04 +0000265 sf_MInst_sfsf <"sfadd", int_hexagon_F2_sfadd>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000266def HEXAGON_F2_sfsub:
Bill Wendling0818e712012-07-19 00:25:04 +0000267 sf_MInst_sfsf <"sfsub", int_hexagon_F2_sfsub>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000268def HEXAGON_F2_sfmpy:
Bill Wendling0818e712012-07-19 00:25:04 +0000269 sf_MInst_sfsf <"sfmpy", int_hexagon_F2_sfmpy>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000270def HEXAGON_F2_sffma:
Bill Wendling0818e712012-07-19 00:25:04 +0000271 sf_MInst_sfsfsf_acc <"sfmpy", int_hexagon_F2_sffma>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000272def HEXAGON_F2_sffma_sc:
Bill Wendling0818e712012-07-19 00:25:04 +0000273 sf_MInst_sfsfsfsi_sc <"sfmpy", int_hexagon_F2_sffma_sc>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000274def HEXAGON_F2_sffms:
Bill Wendling0818e712012-07-19 00:25:04 +0000275 sf_MInst_sfsfsf_nac <"sfmpy", int_hexagon_F2_sffms>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000276def HEXAGON_F2_sffma_lib:
Bill Wendling0818e712012-07-19 00:25:04 +0000277 sf_MInst_sfsfsf_acc_lib <"sfmpy", int_hexagon_F2_sffma_lib>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000278def HEXAGON_F2_sffms_lib:
Bill Wendling0818e712012-07-19 00:25:04 +0000279 sf_MInst_sfsfsf_nac_lib <"sfmpy", int_hexagon_F2_sffms_lib>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000280def HEXAGON_F2_sfcmpeq:
Bill Wendling0818e712012-07-19 00:25:04 +0000281 qi_SInst_sfsf <"sfcmp.eq", int_hexagon_F2_sfcmpeq>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000282def HEXAGON_F2_sfcmpgt:
Bill Wendling0818e712012-07-19 00:25:04 +0000283 qi_SInst_sfsf <"sfcmp.gt", int_hexagon_F2_sfcmpgt>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000284def HEXAGON_F2_sfcmpge:
Bill Wendling0818e712012-07-19 00:25:04 +0000285 qi_SInst_sfsf <"sfcmp.ge", int_hexagon_F2_sfcmpge>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000286def HEXAGON_F2_sfcmpuo:
Bill Wendling0818e712012-07-19 00:25:04 +0000287 qi_SInst_sfsf <"sfcmp.uo", int_hexagon_F2_sfcmpuo>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000288def HEXAGON_F2_sfmax:
Bill Wendling0818e712012-07-19 00:25:04 +0000289 sf_MInst_sfsf <"sfmax", int_hexagon_F2_sfmax>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000290def HEXAGON_F2_sfmin:
Bill Wendling0818e712012-07-19 00:25:04 +0000291 sf_MInst_sfsf <"sfmin", int_hexagon_F2_sfmin>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000292def HEXAGON_F2_sfclass:
Bill Wendling0818e712012-07-19 00:25:04 +0000293 qi_SInst_sfu5 <"sfclass", int_hexagon_F2_sfclass>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000294def HEXAGON_F2_sfimm_p:
Bill Wendling0818e712012-07-19 00:25:04 +0000295 sf_ALU64_u10_pos <"sfmake", int_hexagon_F2_sfimm_p>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000296def HEXAGON_F2_sfimm_n:
Bill Wendling0818e712012-07-19 00:25:04 +0000297 sf_ALU64_u10_neg <"sfmake", int_hexagon_F2_sfimm_n>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000298def HEXAGON_F2_sffixupn:
Bill Wendling0818e712012-07-19 00:25:04 +0000299 sf_MInst_sfsf <"sffixupn", int_hexagon_F2_sffixupn>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000300def HEXAGON_F2_sffixupd:
Bill Wendling0818e712012-07-19 00:25:04 +0000301 sf_MInst_sfsf <"sffixupd", int_hexagon_F2_sffixupd>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000302def HEXAGON_F2_sffixupr:
Bill Wendling0818e712012-07-19 00:25:04 +0000303 sf_SInst_sf <"sffixupr", int_hexagon_F2_sffixupr>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000304def HEXAGON_F2_dfadd:
Bill Wendling0818e712012-07-19 00:25:04 +0000305 df_MInst_dfdf <"dfadd", int_hexagon_F2_dfadd>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000306def HEXAGON_F2_dfsub:
Bill Wendling0818e712012-07-19 00:25:04 +0000307 df_MInst_dfdf <"dfsub", int_hexagon_F2_dfsub>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000308def HEXAGON_F2_dfmpy:
Bill Wendling0818e712012-07-19 00:25:04 +0000309 df_MInst_dfdf <"dfmpy", int_hexagon_F2_dfmpy>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000310def HEXAGON_F2_dffma:
Bill Wendling0818e712012-07-19 00:25:04 +0000311 df_MInst_dfdfdf_acc <"dfmpy", int_hexagon_F2_dffma>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000312def HEXAGON_F2_dffms:
Bill Wendling0818e712012-07-19 00:25:04 +0000313 df_MInst_dfdfdf_nac <"dfmpy", int_hexagon_F2_dffms>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000314def HEXAGON_F2_dffma_lib:
Bill Wendling0818e712012-07-19 00:25:04 +0000315 df_MInst_dfdfdf_acc_lib <"dfmpy", int_hexagon_F2_dffma_lib>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000316def HEXAGON_F2_dffms_lib:
Bill Wendling0818e712012-07-19 00:25:04 +0000317 df_MInst_dfdfdf_nac_lib <"dfmpy", int_hexagon_F2_dffms_lib>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000318def HEXAGON_F2_dffma_sc:
Bill Wendling0818e712012-07-19 00:25:04 +0000319 df_MInst_dfdfdfsi_sc <"dfmpy", int_hexagon_F2_dffma_sc>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000320def HEXAGON_F2_dfmax:
Bill Wendling0818e712012-07-19 00:25:04 +0000321 df_MInst_dfdf <"dfmax", int_hexagon_F2_dfmax>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000322def HEXAGON_F2_dfmin:
Bill Wendling0818e712012-07-19 00:25:04 +0000323 df_MInst_dfdf <"dfmin", int_hexagon_F2_dfmin>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000324def HEXAGON_F2_dfcmpeq:
Bill Wendling0818e712012-07-19 00:25:04 +0000325 qi_ALU64_dfdf <"dfcmp.eq", int_hexagon_F2_dfcmpeq>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000326def HEXAGON_F2_dfcmpgt:
Bill Wendling0818e712012-07-19 00:25:04 +0000327 qi_ALU64_dfdf <"dfcmp.gt", int_hexagon_F2_dfcmpgt>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000328def HEXAGON_F2_dfcmpge:
Bill Wendling0818e712012-07-19 00:25:04 +0000329 qi_ALU64_dfdf <"dfcmp.ge", int_hexagon_F2_dfcmpge>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000330def HEXAGON_F2_dfcmpuo:
Bill Wendling0818e712012-07-19 00:25:04 +0000331 qi_ALU64_dfdf <"dfcmp.uo", int_hexagon_F2_dfcmpuo>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000332def HEXAGON_F2_dfclass:
Bill Wendling0818e712012-07-19 00:25:04 +0000333 qi_ALU64_dfu5 <"dfclass", int_hexagon_F2_dfclass>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000334def HEXAGON_F2_dfimm_p:
Bill Wendling0818e712012-07-19 00:25:04 +0000335 df_ALU64_u10_pos <"dfmake", int_hexagon_F2_dfimm_p>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000336def HEXAGON_F2_dfimm_n:
Bill Wendling0818e712012-07-19 00:25:04 +0000337 df_ALU64_u10_neg <"dfmake", int_hexagon_F2_dfimm_n>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000338def HEXAGON_F2_dffixupn:
Bill Wendling0818e712012-07-19 00:25:04 +0000339 df_MInst_dfdf <"dffixupn", int_hexagon_F2_dffixupn>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000340def HEXAGON_F2_dffixupd:
Bill Wendling0818e712012-07-19 00:25:04 +0000341 df_MInst_dfdf <"dffixupd", int_hexagon_F2_dffixupd>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000342def HEXAGON_F2_dffixupr:
Bill Wendling0818e712012-07-19 00:25:04 +0000343 df_SInst_df <"dffixupr", int_hexagon_F2_dffixupr>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000344def HEXAGON_F2_conv_sf2df:
Bill Wendling0818e712012-07-19 00:25:04 +0000345 df_SInst_sf <"convert_sf2df", int_hexagon_F2_conv_sf2df>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000346def HEXAGON_F2_conv_df2sf:
Bill Wendling0818e712012-07-19 00:25:04 +0000347 sf_SInst_df <"convert_df2sf", int_hexagon_F2_conv_df2sf>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000348def HEXAGON_F2_conv_uw2sf:
Bill Wendling0818e712012-07-19 00:25:04 +0000349 sf_SInst_si <"convert_uw2sf", int_hexagon_F2_conv_uw2sf>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000350def HEXAGON_F2_conv_uw2df:
Bill Wendling0818e712012-07-19 00:25:04 +0000351 df_SInst_si <"convert_uw2df", int_hexagon_F2_conv_uw2df>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000352def HEXAGON_F2_conv_w2sf:
Bill Wendling0818e712012-07-19 00:25:04 +0000353 sf_SInst_si <"convert_w2sf", int_hexagon_F2_conv_w2sf>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000354def HEXAGON_F2_conv_w2df:
Bill Wendling0818e712012-07-19 00:25:04 +0000355 df_SInst_si <"convert_w2df", int_hexagon_F2_conv_w2df>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000356def HEXAGON_F2_conv_ud2sf:
Bill Wendling0818e712012-07-19 00:25:04 +0000357 sf_SInst_di <"convert_ud2sf", int_hexagon_F2_conv_ud2sf>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000358def HEXAGON_F2_conv_ud2df:
Bill Wendling0818e712012-07-19 00:25:04 +0000359 df_SInst_di <"convert_ud2df", int_hexagon_F2_conv_ud2df>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000360def HEXAGON_F2_conv_d2sf:
Bill Wendling0818e712012-07-19 00:25:04 +0000361 sf_SInst_di <"convert_d2sf", int_hexagon_F2_conv_d2sf>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000362def HEXAGON_F2_conv_d2df:
Bill Wendling0818e712012-07-19 00:25:04 +0000363 df_SInst_di <"convert_d2df", int_hexagon_F2_conv_d2df>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000364def HEXAGON_F2_conv_sf2uw:
Bill Wendling0818e712012-07-19 00:25:04 +0000365 si_SInst_sf <"convert_sf2uw", int_hexagon_F2_conv_sf2uw>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000366def HEXAGON_F2_conv_sf2w:
Bill Wendling0818e712012-07-19 00:25:04 +0000367 si_SInst_sf <"convert_sf2w", int_hexagon_F2_conv_sf2w>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000368def HEXAGON_F2_conv_sf2ud:
Bill Wendling0818e712012-07-19 00:25:04 +0000369 di_SInst_sf <"convert_sf2ud", int_hexagon_F2_conv_sf2ud>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000370def HEXAGON_F2_conv_sf2d:
Bill Wendling0818e712012-07-19 00:25:04 +0000371 di_SInst_sf <"convert_sf2d", int_hexagon_F2_conv_sf2d>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000372def HEXAGON_F2_conv_df2uw:
Bill Wendling0818e712012-07-19 00:25:04 +0000373 si_SInst_df <"convert_df2uw", int_hexagon_F2_conv_df2uw>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000374def HEXAGON_F2_conv_df2w:
Bill Wendling0818e712012-07-19 00:25:04 +0000375 si_SInst_df <"convert_df2w", int_hexagon_F2_conv_df2w>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000376def HEXAGON_F2_conv_df2ud:
Bill Wendling0818e712012-07-19 00:25:04 +0000377 di_SInst_df <"convert_df2ud", int_hexagon_F2_conv_df2ud>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000378def HEXAGON_F2_conv_df2d:
Bill Wendling0818e712012-07-19 00:25:04 +0000379 di_SInst_df <"convert_df2d", int_hexagon_F2_conv_df2d>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000380def HEXAGON_F2_conv_sf2uw_chop:
Bill Wendling0818e712012-07-19 00:25:04 +0000381 si_SInst_sf <"convert_sf2uw", int_hexagon_F2_conv_sf2uw_chop>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000382def HEXAGON_F2_conv_sf2w_chop:
Bill Wendling0818e712012-07-19 00:25:04 +0000383 si_SInst_sf <"convert_sf2w", int_hexagon_F2_conv_sf2w_chop>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000384def HEXAGON_F2_conv_sf2ud_chop:
Bill Wendling0818e712012-07-19 00:25:04 +0000385 di_SInst_sf <"convert_sf2ud", int_hexagon_F2_conv_sf2ud_chop>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000386def HEXAGON_F2_conv_sf2d_chop:
Bill Wendling0818e712012-07-19 00:25:04 +0000387 di_SInst_sf <"convert_sf2d", int_hexagon_F2_conv_sf2d_chop>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000388def HEXAGON_F2_conv_df2uw_chop:
Bill Wendling0818e712012-07-19 00:25:04 +0000389 si_SInst_df <"convert_df2uw", int_hexagon_F2_conv_df2uw_chop>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000390def HEXAGON_F2_conv_df2w_chop:
Bill Wendling0818e712012-07-19 00:25:04 +0000391 si_SInst_df <"convert_df2w", int_hexagon_F2_conv_df2w_chop>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000392def HEXAGON_F2_conv_df2ud_chop:
Bill Wendling0818e712012-07-19 00:25:04 +0000393 di_SInst_df <"convert_df2ud", int_hexagon_F2_conv_df2ud_chop>;
Sirish Pande81e900d2012-05-11 19:39:13 +0000394def HEXAGON_F2_conv_df2d_chop:
Bill Wendling0818e712012-07-19 00:25:04 +0000395 di_SInst_df <"convert_df2d", int_hexagon_F2_conv_df2d_chop>;