Jia Liu | c570711 | 2012-02-17 08:55:11 +0000 | [diff] [blame] | 1 | //===-- DelaySlotFiller.cpp - Mips Delay Slot Filler ----------------------===// |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 7 | // |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 8 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 9 | // |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 10 | // Simple pass to fills delay slots with useful instructions. |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 11 | // |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 12 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 13 | |
| 14 | #define DEBUG_TYPE "delay-slot-filler" |
| 15 | |
| 16 | #include "Mips.h" |
| 17 | #include "MipsTargetMachine.h" |
Chandler Carruth | d04a8d4 | 2012-12-03 16:50:05 +0000 | [diff] [blame] | 18 | #include "llvm/ADT/SmallSet.h" |
| 19 | #include "llvm/ADT/Statistic.h" |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 20 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 21 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 22 | #include "llvm/Support/CommandLine.h" |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 23 | #include "llvm/Target/TargetInstrInfo.h" |
Chandler Carruth | d04a8d4 | 2012-12-03 16:50:05 +0000 | [diff] [blame] | 24 | #include "llvm/Target/TargetMachine.h" |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 25 | #include "llvm/Target/TargetRegisterInfo.h" |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 26 | |
| 27 | using namespace llvm; |
| 28 | |
| 29 | STATISTIC(FilledSlots, "Number of delay slots filled"); |
Akira Hatanaka | 98f4d4d | 2011-10-05 01:19:13 +0000 | [diff] [blame] | 30 | STATISTIC(UsefulSlots, "Number of delay slots filled with instructions that" |
Akira Hatanaka | 176965f | 2011-10-05 02:22:49 +0000 | [diff] [blame] | 31 | " are not NOP."); |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 32 | |
Akira Hatanaka | 6522a9e | 2012-08-22 02:51:28 +0000 | [diff] [blame] | 33 | static cl::opt<bool> DisableDelaySlotFiller( |
| 34 | "disable-mips-delay-filler", |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 35 | cl::init(false), |
Akira Hatanaka | 6522a9e | 2012-08-22 02:51:28 +0000 | [diff] [blame] | 36 | cl::desc("Disable the delay slot filler, which attempts to fill the Mips" |
| 37 | "delay slots with useful instructions."), |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 38 | cl::Hidden); |
| 39 | |
Akira Hatanaka | f9c3f3b | 2012-05-14 23:59:17 +0000 | [diff] [blame] | 40 | // This option can be used to silence complaints by machine verifier passes. |
| 41 | static cl::opt<bool> SkipDelaySlotFiller( |
| 42 | "skip-mips-delay-filler", |
| 43 | cl::init(false), |
| 44 | cl::desc("Skip MIPS' delay slot filling pass."), |
| 45 | cl::Hidden); |
| 46 | |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 47 | namespace { |
| 48 | struct Filler : public MachineFunctionPass { |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 49 | typedef MachineBasicBlock::instr_iterator InstrIter; |
| 50 | typedef MachineBasicBlock::reverse_instr_iterator ReverseInstrIter; |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 51 | |
| 52 | TargetMachine &TM; |
| 53 | const TargetInstrInfo *TII; |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 54 | InstrIter LastFiller; |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 55 | |
| 56 | static char ID; |
Bruno Cardoso Lopes | 90c5954 | 2010-12-09 17:31:11 +0000 | [diff] [blame] | 57 | Filler(TargetMachine &tm) |
Owen Anderson | 90c579d | 2010-08-06 18:33:48 +0000 | [diff] [blame] | 58 | : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { } |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 59 | |
| 60 | virtual const char *getPassName() const { |
| 61 | return "Mips Delay Slot Filler"; |
| 62 | } |
| 63 | |
| 64 | bool runOnMachineBasicBlock(MachineBasicBlock &MBB); |
| 65 | bool runOnMachineFunction(MachineFunction &F) { |
Akira Hatanaka | f9c3f3b | 2012-05-14 23:59:17 +0000 | [diff] [blame] | 66 | if (SkipDelaySlotFiller) |
| 67 | return false; |
| 68 | |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 69 | bool Changed = false; |
| 70 | for (MachineFunction::iterator FI = F.begin(), FE = F.end(); |
| 71 | FI != FE; ++FI) |
| 72 | Changed |= runOnMachineBasicBlock(*FI); |
| 73 | return Changed; |
| 74 | } |
| 75 | |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 76 | bool isDelayFiller(MachineBasicBlock &MBB, |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 77 | InstrIter candidate); |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 78 | |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 79 | void insertCallUses(InstrIter MI, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 80 | SmallSet<unsigned, 32> &RegDefs, |
| 81 | SmallSet<unsigned, 32> &RegUses); |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 82 | |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 83 | void insertDefsUses(InstrIter MI, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 84 | SmallSet<unsigned, 32> &RegDefs, |
| 85 | SmallSet<unsigned, 32> &RegUses); |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 86 | |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 87 | bool IsRegInSet(SmallSet<unsigned, 32> &RegSet, |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 88 | unsigned Reg); |
| 89 | |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 90 | bool delayHasHazard(InstrIter candidate, |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 91 | bool &sawLoad, bool &sawStore, |
| 92 | SmallSet<unsigned, 32> &RegDefs, |
| 93 | SmallSet<unsigned, 32> &RegUses); |
| 94 | |
Akira Hatanaka | 6f818ab | 2011-10-05 01:23:39 +0000 | [diff] [blame] | 95 | bool |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 96 | findDelayInstr(MachineBasicBlock &MBB, InstrIter slot, |
| 97 | InstrIter &Filler); |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 98 | |
| 99 | |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 100 | }; |
| 101 | char Filler::ID = 0; |
| 102 | } // end of anonymous namespace |
| 103 | |
| 104 | /// runOnMachineBasicBlock - Fill in delay slots for the given basic block. |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 105 | /// We assume there is only one delay slot per delayed instruction. |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 106 | bool Filler:: |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 107 | runOnMachineBasicBlock(MachineBasicBlock &MBB) { |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 108 | bool Changed = false; |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 109 | LastFiller = MBB.instr_end(); |
Akira Hatanaka | 53120e0 | 2011-10-05 01:30:09 +0000 | [diff] [blame] | 110 | |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 111 | for (InstrIter I = MBB.instr_begin(); I != MBB.instr_end(); ++I) |
Evan Cheng | 5a96b3d | 2011-12-07 07:15:52 +0000 | [diff] [blame] | 112 | if (I->hasDelaySlot()) { |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 113 | ++FilledSlots; |
| 114 | Changed = true; |
Jakob Stoklund Olesen | 06180bf | 2012-12-07 04:23:40 +0000 | [diff] [blame] | 115 | InstrIter InstrWithSlot = I; |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 116 | InstrIter D; |
Akira Hatanaka | 6f818ab | 2011-10-05 01:23:39 +0000 | [diff] [blame] | 117 | |
Akira Hatanaka | 16865d0 | 2012-08-24 20:40:15 +0000 | [diff] [blame] | 118 | // Delay slot filling is disabled at -O0. |
| 119 | if (!DisableDelaySlotFiller && (TM.getOptLevel() != CodeGenOpt::None) && |
| 120 | findDelayInstr(MBB, I, D)) { |
Akira Hatanaka | 6f818ab | 2011-10-05 01:23:39 +0000 | [diff] [blame] | 121 | MBB.splice(llvm::next(I), &MBB, D); |
| 122 | ++UsefulSlots; |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 123 | } else |
Akira Hatanaka | 6f818ab | 2011-10-05 01:23:39 +0000 | [diff] [blame] | 124 | BuildMI(MBB, llvm::next(I), I->getDebugLoc(), TII->get(Mips::NOP)); |
| 125 | |
Akira Hatanaka | 53120e0 | 2011-10-05 01:30:09 +0000 | [diff] [blame] | 126 | // Record the filler instruction that filled the delay slot. |
| 127 | // The instruction after it will be visited in the next iteration. |
| 128 | LastFiller = ++I; |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 129 | |
Jakob Stoklund Olesen | 06180bf | 2012-12-07 04:23:40 +0000 | [diff] [blame] | 130 | // Bundle the delay slot filler to InstrWithSlot so that the machine |
| 131 | // verifier doesn't expect this instruction to be a terminator. |
| 132 | MIBundleBuilder(MBB, InstrWithSlot, llvm::next(LastFiller)); |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 133 | } |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 134 | return Changed; |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 135 | |
Bruno Cardoso Lopes | 9684a69 | 2007-08-18 01:50:47 +0000 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | /// createMipsDelaySlotFillerPass - Returns a pass that fills in delay |
| 139 | /// slots in Mips MachineFunctions |
| 140 | FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine &tm) { |
| 141 | return new Filler(tm); |
| 142 | } |
| 143 | |
Akira Hatanaka | 6f818ab | 2011-10-05 01:23:39 +0000 | [diff] [blame] | 144 | bool Filler::findDelayInstr(MachineBasicBlock &MBB, |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 145 | InstrIter slot, |
| 146 | InstrIter &Filler) { |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 147 | SmallSet<unsigned, 32> RegDefs; |
| 148 | SmallSet<unsigned, 32> RegUses; |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 149 | |
Akira Hatanaka | 0f0c59a0 | 2011-10-05 02:04:17 +0000 | [diff] [blame] | 150 | insertDefsUses(slot, RegDefs, RegUses); |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 151 | |
Akira Hatanaka | 7d8e04d | 2011-10-05 01:57:46 +0000 | [diff] [blame] | 152 | bool sawLoad = false; |
| 153 | bool sawStore = false; |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 154 | |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 155 | for (ReverseInstrIter I(slot); I != MBB.instr_rend(); ++I) { |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 156 | // skip debug value |
| 157 | if (I->isDebugValue()) |
| 158 | continue; |
| 159 | |
Akira Hatanaka | 7d8e04d | 2011-10-05 01:57:46 +0000 | [diff] [blame] | 160 | // Convert to forward iterator. |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 161 | InstrIter FI(llvm::next(I).base()); |
Akira Hatanaka | 7d8e04d | 2011-10-05 01:57:46 +0000 | [diff] [blame] | 162 | |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 163 | if (I->hasUnmodeledSideEffects() |
| 164 | || I->isInlineAsm() |
| 165 | || I->isLabel() |
Akira Hatanaka | 7d8e04d | 2011-10-05 01:57:46 +0000 | [diff] [blame] | 166 | || FI == LastFiller |
Evan Cheng | 5a96b3d | 2011-12-07 07:15:52 +0000 | [diff] [blame] | 167 | || I->isPseudo() |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 168 | // |
| 169 | // Should not allow: |
| 170 | // ERET, DERET or WAIT, PAUSE. Need to add these to instruction |
| 171 | // list. TBD. |
| 172 | ) |
| 173 | break; |
| 174 | |
Akira Hatanaka | 7d8e04d | 2011-10-05 01:57:46 +0000 | [diff] [blame] | 175 | if (delayHasHazard(FI, sawLoad, sawStore, RegDefs, RegUses)) { |
| 176 | insertDefsUses(FI, RegDefs, RegUses); |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 177 | continue; |
| 178 | } |
| 179 | |
Akira Hatanaka | 7d8e04d | 2011-10-05 01:57:46 +0000 | [diff] [blame] | 180 | Filler = FI; |
Akira Hatanaka | 6f818ab | 2011-10-05 01:23:39 +0000 | [diff] [blame] | 181 | return true; |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 182 | } |
Akira Hatanaka | 6f818ab | 2011-10-05 01:23:39 +0000 | [diff] [blame] | 183 | |
| 184 | return false; |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 185 | } |
| 186 | |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 187 | bool Filler::delayHasHazard(InstrIter candidate, |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 188 | bool &sawLoad, bool &sawStore, |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 189 | SmallSet<unsigned, 32> &RegDefs, |
| 190 | SmallSet<unsigned, 32> &RegUses) { |
| 191 | if (candidate->isImplicitDef() || candidate->isKill()) |
| 192 | return true; |
| 193 | |
Akira Hatanaka | cfc3fb5 | 2011-10-05 01:09:37 +0000 | [diff] [blame] | 194 | // Loads or stores cannot be moved past a store to the delay slot |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 195 | // and stores cannot be moved past a load. |
Evan Cheng | 5a96b3d | 2011-12-07 07:15:52 +0000 | [diff] [blame] | 196 | if (candidate->mayLoad()) { |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 197 | if (sawStore) |
| 198 | return true; |
Akira Hatanaka | cfc3fb5 | 2011-10-05 01:09:37 +0000 | [diff] [blame] | 199 | sawLoad = true; |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 200 | } |
| 201 | |
Evan Cheng | 5a96b3d | 2011-12-07 07:15:52 +0000 | [diff] [blame] | 202 | if (candidate->mayStore()) { |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 203 | if (sawStore) |
| 204 | return true; |
| 205 | sawStore = true; |
| 206 | if (sawLoad) |
| 207 | return true; |
| 208 | } |
| 209 | |
Evan Cheng | 5a96b3d | 2011-12-07 07:15:52 +0000 | [diff] [blame] | 210 | assert((!candidate->isCall() && !candidate->isReturn()) && |
Akira Hatanaka | 42be280 | 2011-10-05 18:17:49 +0000 | [diff] [blame] | 211 | "Cannot put calls or returns in delay slot."); |
Akira Hatanaka | 0c419a7 | 2011-10-05 02:18:58 +0000 | [diff] [blame] | 212 | |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 213 | for (unsigned i = 0, e = candidate->getNumOperands(); i!= e; ++i) { |
| 214 | const MachineOperand &MO = candidate->getOperand(i); |
Akira Hatanaka | 0c419a7 | 2011-10-05 02:18:58 +0000 | [diff] [blame] | 215 | unsigned Reg; |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 216 | |
Akira Hatanaka | 0c419a7 | 2011-10-05 02:18:58 +0000 | [diff] [blame] | 217 | if (!MO.isReg() || !(Reg = MO.getReg())) |
| 218 | continue; // skip |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 219 | |
| 220 | if (MO.isDef()) { |
| 221 | // check whether Reg is defined or used before delay slot. |
| 222 | if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg)) |
| 223 | return true; |
| 224 | } |
| 225 | if (MO.isUse()) { |
| 226 | // check whether Reg is defined before delay slot. |
| 227 | if (IsRegInSet(RegDefs, Reg)) |
| 228 | return true; |
| 229 | } |
| 230 | } |
| 231 | return false; |
| 232 | } |
| 233 | |
Akira Hatanaka | a032dbd | 2012-11-16 02:39:34 +0000 | [diff] [blame] | 234 | // Helper function for getting a MachineOperand's register number and adding it |
| 235 | // to RegDefs or RegUses. |
| 236 | static void insertDefUse(const MachineOperand &MO, |
| 237 | SmallSet<unsigned, 32> &RegDefs, |
| 238 | SmallSet<unsigned, 32> &RegUses, |
| 239 | unsigned ExcludedReg = 0) { |
| 240 | unsigned Reg; |
| 241 | |
| 242 | if (!MO.isReg() || !(Reg = MO.getReg()) || (Reg == ExcludedReg)) |
| 243 | return; |
| 244 | |
| 245 | if (MO.isDef()) |
| 246 | RegDefs.insert(Reg); |
| 247 | else if (MO.isUse()) |
| 248 | RegUses.insert(Reg); |
| 249 | } |
| 250 | |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 251 | // Insert Defs and Uses of MI into the sets RegDefs and RegUses. |
Akira Hatanaka | 1584139 | 2012-06-13 23:25:52 +0000 | [diff] [blame] | 252 | void Filler::insertDefsUses(InstrIter MI, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 253 | SmallSet<unsigned, 32> &RegDefs, |
| 254 | SmallSet<unsigned, 32> &RegUses) { |
Akira Hatanaka | a032dbd | 2012-11-16 02:39:34 +0000 | [diff] [blame] | 255 | unsigned I, E = MI->getDesc().getNumOperands(); |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 256 | |
Akira Hatanaka | a032dbd | 2012-11-16 02:39:34 +0000 | [diff] [blame] | 257 | for (I = 0; I != E; ++I) |
| 258 | insertDefUse(MI->getOperand(I), RegDefs, RegUses); |
| 259 | |
| 260 | // If MI is a call, add RA to RegDefs to prevent users of RA from going into |
| 261 | // delay slot. |
| 262 | if (MI->isCall()) { |
Akira Hatanaka | 2f52338 | 2011-10-05 18:11:44 +0000 | [diff] [blame] | 263 | RegDefs.insert(Mips::RA); |
Akira Hatanaka | a032dbd | 2012-11-16 02:39:34 +0000 | [diff] [blame] | 264 | return; |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 265 | } |
Akira Hatanaka | a032dbd | 2012-11-16 02:39:34 +0000 | [diff] [blame] | 266 | |
| 267 | // Return if MI is a return. |
| 268 | if (MI->isReturn()) |
| 269 | return; |
| 270 | |
| 271 | // Examine the implicit operands. Exclude register AT which is in the list of |
| 272 | // clobbered registers of branch instructions. |
| 273 | E = MI->getNumOperands(); |
| 274 | for (; I != E; ++I) |
| 275 | insertDefUse(MI->getOperand(I), RegDefs, RegUses, Mips::AT); |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 276 | } |
| 277 | |
| 278 | //returns true if the Reg or its alias is in the RegSet. |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 279 | bool Filler::IsRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg) { |
Jakob Stoklund Olesen | f152fe8 | 2012-06-01 20:36:54 +0000 | [diff] [blame] | 280 | // Check Reg and all aliased Registers. |
| 281 | for (MCRegAliasIterator AI(Reg, TM.getRegisterInfo(), true); |
| 282 | AI.isValid(); ++AI) |
| 283 | if (RegSet.count(*AI)) |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 284 | return true; |
Akira Hatanaka | a3defb0 | 2011-09-29 23:52:13 +0000 | [diff] [blame] | 285 | return false; |
| 286 | } |