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Wesley Pecka70f28c2010-02-23 19:15:24 +00001//===-- DelaySlotFiller.cpp - MBlaze delay slot filler --------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Simple pass to fills delay slots with NOPs.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "delay-slot-filler"
15
16#include "MBlaze.h"
17#include "MBlazeTargetMachine.h"
18#include "llvm/CodeGen/MachineFunctionPass.h"
19#include "llvm/CodeGen/MachineInstrBuilder.h"
20#include "llvm/Target/TargetInstrInfo.h"
21#include "llvm/ADT/Statistic.h"
Wesley Peck4e9141f2010-10-21 03:57:26 +000022#include "llvm/Support/CommandLine.h"
23#include "llvm/Support/Debug.h"
24#include "llvm/Support/ErrorHandling.h"
25#include "llvm/Support/raw_ostream.h"
Wesley Pecka70f28c2010-02-23 19:15:24 +000026
27using namespace llvm;
28
29STATISTIC(FilledSlots, "Number of delay slots filled");
30
31namespace {
32 struct Filler : public MachineFunctionPass {
33
34 TargetMachine &TM;
35 const TargetInstrInfo *TII;
36
37 static char ID;
38 Filler(TargetMachine &tm)
Owen Anderson90c579d2010-08-06 18:33:48 +000039 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
Wesley Pecka70f28c2010-02-23 19:15:24 +000040
41 virtual const char *getPassName() const {
42 return "MBlaze Delay Slot Filler";
43 }
44
45 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
46 bool runOnMachineFunction(MachineFunction &F) {
47 bool Changed = false;
48 for (MachineFunction::iterator FI = F.begin(), FE = F.end();
49 FI != FE; ++FI)
50 Changed |= runOnMachineBasicBlock(*FI);
51 return Changed;
52 }
53
54 };
55 char Filler::ID = 0;
56} // end of anonymous namespace
57
Wesley Peck4e9141f2010-10-21 03:57:26 +000058static bool hasImmInstruction( MachineBasicBlock::iterator &candidate ) {
59 // Any instruction with an immediate mode operand greater than
60 // 16-bits requires an implicit IMM instruction.
61 unsigned numOper = candidate->getNumOperands();
62 for( unsigned op = 0; op < numOper; ++op ) {
63 if( candidate->getOperand(op).isImm() &&
64 (candidate->getOperand(op).getImm() & 0xFFFFFFFFFFFF0000LL) != 0 )
65 return true;
66
67 // FIXME: we could probably check to see if the FP value happens
68 // to not need an IMM instruction. For now we just always
69 // assume that FP values always do.
70 if( candidate->getOperand(op).isFPImm() )
71 return true;
72 }
73
74 return false;
75}
76
77static bool delayHasHazard( MachineBasicBlock::iterator &candidate,
78 MachineBasicBlock::iterator &slot ) {
79
80 // Loop over all of the operands in the branch instruction
81 // and make sure that none of them are defined by the
82 // candidate instruction.
83 unsigned numOper = slot->getNumOperands();
84 for( unsigned op = 0; op < numOper; ++op ) {
85 if( !slot->getOperand(op).isReg() ||
86 !slot->getOperand(op).isUse() ||
87 slot->getOperand(op).isImplicit() )
88 continue;
89
90 unsigned cnumOper = candidate->getNumOperands();
91 for( unsigned cop = 0; cop < cnumOper; ++cop ) {
92 if( candidate->getOperand(cop).isReg() &&
93 candidate->getOperand(cop).isDef() &&
94 candidate->getOperand(cop).getReg() ==
95 slot->getOperand(op).getReg() )
96 return true;
97 }
98 }
99
100 // There are no hazards between the two instructions
101 return false;
102}
103
104static bool usedBeforeDelaySlot( MachineBasicBlock::iterator &candidate,
105 MachineBasicBlock::iterator &slot ) {
106 MachineBasicBlock::iterator I = candidate;
107 for (++I; I != slot; ++I) {
108 unsigned numOper = I->getNumOperands();
109 for( unsigned op = 0; op < numOper; ++op ) {
110 if( I->getOperand(op).isReg() &&
111 I->getOperand(op).isUse() ) {
112 unsigned reg = I->getOperand(op).getReg();
113 unsigned cops = candidate->getNumOperands();
114 for( unsigned cop = 0; cop < cops; ++cop ) {
115 if( candidate->getOperand(cop).isReg() &&
116 candidate->getOperand(cop).isDef() &&
117 candidate->getOperand(cop).getReg() == reg )
118 return true;
119 }
120 }
121 }
122 }
123
124 return false;
125}
126
127static MachineBasicBlock::iterator
128findDelayInstr(MachineBasicBlock &MBB,MachineBasicBlock::iterator &slot) {
129 MachineBasicBlock::iterator found = MBB.end();
130 for (MachineBasicBlock::iterator I = MBB.begin(); I != slot; ++I) {
131 TargetInstrDesc desc = I->getDesc();
132 if( desc.hasDelaySlot() || desc.isBranch() ||
133 desc.mayLoad() || desc. mayStore() ||
134 hasImmInstruction(I) || delayHasHazard(I,slot) ||
135 usedBeforeDelaySlot(I,slot)) continue;
136
137 found = I;
138 }
139
140 return found;
141}
142
Wesley Pecka70f28c2010-02-23 19:15:24 +0000143/// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
144/// Currently, we fill delay slots with NOPs. We assume there is only one
145/// delay slot per delayed instruction.
146bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
147 bool Changed = false;
148 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
149 if (I->getDesc().hasDelaySlot()) {
150 MachineBasicBlock::iterator J = I;
Wesley Peck4e9141f2010-10-21 03:57:26 +0000151 MachineBasicBlock::iterator D = findDelayInstr(MBB,I);
152
Wesley Pecka70f28c2010-02-23 19:15:24 +0000153 ++J;
Wesley Pecka70f28c2010-02-23 19:15:24 +0000154 ++FilledSlots;
155 Changed = true;
Wesley Peck4e9141f2010-10-21 03:57:26 +0000156
157 if( D == MBB.end() )
158 BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
159 else
160 MBB.splice( J, &MBB, D );
Wesley Pecka70f28c2010-02-23 19:15:24 +0000161 }
162 return Changed;
163}
164
165/// createMBlazeDelaySlotFillerPass - Returns a pass that fills in delay
166/// slots in MBlaze MachineFunctions
167FunctionPass *llvm::createMBlazeDelaySlotFillerPass(MBlazeTargetMachine &tm) {
168 return new Filler(tm);
169}
170