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Rafael Espindola7bc59bc2006-05-14 22:18:28 +00001//===- ARMInstrInfo.h - ARM Instruction Information --------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the "Instituto Nokia de Tecnologia" and
6// is distributed under the University of Illinois Open Source
7// License. See LICENSE.TXT for details.
8//
9//===----------------------------------------------------------------------===//
10//
11// This file contains the ARM implementation of the TargetInstrInfo class.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef ARMINSTRUCTIONINFO_H
16#define ARMINSTRUCTIONINFO_H
17
18#include "llvm/Target/TargetInstrInfo.h"
19#include "ARMRegisterInfo.h"
20
21namespace llvm {
22
23class ARMInstrInfo : public TargetInstrInfo {
24 const ARMRegisterInfo RI;
25public:
26 ARMInstrInfo();
27
28 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
29 /// such, whenever a client has an instance of instruction info, it should
30 /// always be able to get register info as well (through this method).
31 ///
32 virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
33
Rafael Espindola46adf812006-08-08 20:35:03 +000034 /// getPointerRegClass - Return the register class to use to hold pointers.
35 /// This is used for addressing modes.
36 virtual const TargetRegisterClass *getPointerRegClass() const;
37
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000038 /// Return true if the instruction is a register to register move and
39 /// leave the source and dest operands in the passed parameters.
40 ///
41 virtual bool isMoveInstr(const MachineInstr &MI,
42 unsigned &SrcReg, unsigned &DstReg) const;
Chris Lattner578e64a2006-10-24 16:47:57 +000043
44 virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
45 MachineBasicBlock *FBB,
46 const std::vector<MachineOperand> &Cond) const;
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000047};
48
49}
50
51#endif