| Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 1 | =pod |
| 2 | |
| 3 | =head1 NAME |
| 4 | |
| 5 | llc - LLVM static compiler |
| 6 | |
| 7 | =head1 SYNOPSIS |
| 8 | |
| 9 | B<llc> [I<options>] [I<filename>] |
| 10 | |
| 11 | =head1 DESCRIPTION |
| 12 | |
| 13 | The B<llc> command compiles LLVM bitcode into assembly language for a |
| 14 | specified architecture. The assembly language output can then be passed through |
| 15 | a native assembler and linker to generate a native executable. |
| 16 | |
| 17 | The choice of architecture for the output assembly code is automatically |
| 18 | determined from the input bitcode file, unless the B<-march> option is used to |
| 19 | override the default. |
| 20 | |
| 21 | =head1 OPTIONS |
| 22 | |
| 23 | If I<filename> is - or omitted, B<llc> reads LLVM bitcode from standard input. |
| 24 | Otherwise, it will read LLVM bitcode from I<filename>. |
| 25 | |
| 26 | If the B<-o> option is omitted, then B<llc> will send its output to standard |
| 27 | output if the input is from standard input. If the B<-o> option specifies -, |
| 28 | then the output will also be sent to standard output. |
| 29 | |
| 30 | If no B<-o> option is specified and an input file other than - is specified, |
| 31 | then B<llc> creates the output filename by taking the input filename, |
| 32 | removing any existing F<.bc> extension, and adding a F<.s> suffix. |
| 33 | |
| 34 | Other B<llc> options are as follows: |
| 35 | |
| 36 | =head2 End-user Options |
| 37 | |
| 38 | =over |
| 39 | |
| 40 | =item B<--help> |
| 41 | |
| 42 | Print a summary of command line options. |
| 43 | |
| Bill Wendling | 58ed5d2 | 2009-04-29 00:15:41 +0000 | [diff] [blame^] | 44 | =item B<-O>=I<uint> |
| 45 | |
| 46 | Generate code at different optimization levels. These correspond to the I<-O0>, |
| 47 | I<-O1>, I<-O2>, I<-O3>, and I<-O4> optimization levels used by B<llvm-gcc> and |
| 48 | B<clang>. |
| 49 | |
| Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 50 | =item B<-f> |
| 51 | |
| 52 | Overwrite output files. By default, B<llc> will refuse to overwrite |
| 53 | an output file which already exists. |
| 54 | |
| 55 | =item B<-mtriple>=I<target triple> |
| 56 | |
| 57 | Override the target triple specified in the input bitcode file with the |
| 58 | specified string. |
| 59 | |
| 60 | =item B<-march>=I<arch> |
| 61 | |
| 62 | Specify the architecture for which to generate assembly, overriding the target |
| 63 | encoded in the bitcode file. See the output of B<llc --help> for a list of |
| 64 | valid architectures. By default this is inferred from the target triple or |
| 65 | autodetected to the current architecture. |
| 66 | |
| 67 | =item B<-mcpu>=I<cpuname> |
| 68 | |
| 69 | Specify a specific chip in the current architecture to generate code for. |
| 70 | By default this is inferred from the target triple and autodetected to |
| 71 | the current architecture. For a list of available CPUs, use: |
| 72 | B<llvm-as E<lt> /dev/null | llc -march=xyz -mcpu=help> |
| 73 | |
| 74 | =item B<-mattr>=I<a1,+a2,-a3,...> |
| 75 | |
| 76 | Override or control specific attributes of the target, such as whether SIMD |
| 77 | operations are enabled or not. The default set of attributes is set by the |
| 78 | current CPU. For a list of available attributes, use: |
| 79 | B<llvm-as E<lt> /dev/null | llc -march=xyz -mattr=help> |
| 80 | |
| 81 | =item B<--disable-fp-elim> |
| 82 | |
| 83 | Disable frame pointer elimination optimization. |
| 84 | |
| 85 | =item B<--disable-excess-fp-precision> |
| 86 | |
| 87 | Disable optimizations that may produce excess precision for floating point. |
| 88 | Note that this option can dramatically slow down code on some systems |
| 89 | (e.g. X86). |
| 90 | |
| 91 | =item B<--enable-unsafe-fp-math> |
| 92 | |
| 93 | Enable optimizations that make unsafe assumptions about IEEE math (e.g. that |
| 94 | addition is associative) or may not work for all input ranges. These |
| 95 | optimizations allow the code generator to make use of some instructions which |
| 96 | would otherwise not be usable (such as fsin on X86). |
| 97 | |
| 98 | =item B<--enable-correct-eh-support> |
| 99 | |
| 100 | Instruct the B<lowerinvoke> pass to insert code for correct exception handling |
| 101 | support. This is expensive and is by default omitted for efficiency. |
| 102 | |
| 103 | =item B<--stats> |
| 104 | |
| 105 | Print statistics recorded by code-generation passes. |
| 106 | |
| 107 | =item B<--time-passes> |
| 108 | |
| 109 | Record the amount of time needed for each pass and print a report to standard |
| 110 | error. |
| 111 | |
| 112 | =item B<--load>=F<dso_path> |
| 113 | |
| 114 | Dynamically load F<dso_path> (a path to a dynamically shared object) that |
| 115 | implements an LLVM target. This will permit the target name to be used with the |
| 116 | B<-march> option so that code can be generated for that target. |
| 117 | |
| 118 | =back |
| 119 | |
| 120 | =head2 Tuning/Configuration Options |
| 121 | |
| 122 | =over |
| 123 | |
| 124 | =item B<--print-machineinstrs> |
| 125 | |
| 126 | Print generated machine code between compilation phases (useful for debugging). |
| 127 | |
| 128 | =item B<--regalloc>=I<allocator> |
| 129 | |
| 130 | Specify the register allocator to use. The default I<allocator> is I<local>. |
| 131 | Valid register allocators are: |
| 132 | |
| 133 | =over |
| 134 | |
| 135 | =item I<simple> |
| 136 | |
| 137 | Very simple "always spill" register allocator |
| 138 | |
| 139 | =item I<local> |
| 140 | |
| 141 | Local register allocator |
| 142 | |
| 143 | =item I<linearscan> |
| 144 | |
| 145 | Linear scan global register allocator |
| 146 | |
| 147 | =item I<iterativescan> |
| 148 | |
| 149 | Iterative scan global register allocator |
| 150 | |
| 151 | =back |
| 152 | |
| 153 | =item B<--spiller>=I<spiller> |
| 154 | |
| 155 | Specify the spiller to use for register allocators that support it. Currently |
| 156 | this option is used only by the linear scan register allocator. The default |
| 157 | I<spiller> is I<local>. Valid spillers are: |
| 158 | |
| 159 | =over |
| 160 | |
| 161 | =item I<simple> |
| 162 | |
| 163 | Simple spiller |
| 164 | |
| 165 | =item I<local> |
| 166 | |
| 167 | Local spiller |
| 168 | |
| 169 | =back |
| 170 | |
| 171 | =back |
| 172 | |
| 173 | =head2 Intel IA-32-specific Options |
| 174 | |
| 175 | =over |
| 176 | |
| 177 | =item B<--x86-asm-syntax=att|intel> |
| 178 | |
| 179 | Specify whether to emit assembly code in AT&T syntax (the default) or intel |
| 180 | syntax. |
| 181 | |
| 182 | =back |
| 183 | |
| 184 | =head1 EXIT STATUS |
| 185 | |
| 186 | If B<llc> succeeds, it will exit with 0. Otherwise, if an error occurs, |
| 187 | it will exit with a non-zero value. |
| 188 | |
| 189 | =head1 SEE ALSO |
| 190 | |
| 191 | L<lli|lli> |
| 192 | |
| 193 | =head1 AUTHORS |
| 194 | |
| 195 | Maintained by the LLVM Team (L<http://llvm.org>). |
| 196 | |
| 197 | =cut |