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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 5b51fd5b550a9589f95e677fca801cea565e8d9f / . / test / CodeGen / PowerPC / fast-isel-conversion.ll
blob: a31c31210c39c5ae2453390601b5301cfdac9bf2 [file] [log] [blame]
Bill Schmidt9bc94272013-08-30 15:18:11 +0000[diff] [blame]1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
2
3; Test sitofp
4
5define void @sitofp_single_i64(i64 %a, float %b) nounwind ssp {
6entry:
7; ELF64: sitofp_single_i64
8 %b.addr = alloca float, align 4
9 %conv = sitofp i64 %a to float
10; ELF64: std
11; ELF64: lfd
12; ELF64: fcfids
13 store float %conv, float* %b.addr, align 4
14 ret void
15}
16
17define void @sitofp_single_i32(i32 %a, float %b) nounwind ssp {
18entry:
19; ELF64: sitofp_single_i32
20 %b.addr = alloca float, align 4
21 %conv = sitofp i32 %a to float
22; ELF64: std
23; ELF64: lfiwax
24; ELF64: fcfids
25 store float %conv, float* %b.addr, align 4
26 ret void
27}
28
29define void @sitofp_single_i16(i16 %a, float %b) nounwind ssp {
30entry:
31; ELF64: sitofp_single_i16
32 %b.addr = alloca float, align 4
33 %conv = sitofp i16 %a to float
34; ELF64: extsh
35; ELF64: std
36; ELF64: lfd
37; ELF64: fcfids
38 store float %conv, float* %b.addr, align 4
39 ret void
40}
41
42define void @sitofp_single_i8(i8 %a) nounwind ssp {
43entry:
44; ELF64: sitofp_single_i8
45 %b.addr = alloca float, align 4
46 %conv = sitofp i8 %a to float
47; ELF64: extsb
48; ELF64: std
49; ELF64: lfd
50; ELF64: fcfids
51 store float %conv, float* %b.addr, align 4
52 ret void
53}
54
55define void @sitofp_double_i32(i32 %a, double %b) nounwind ssp {
56entry:
57; ELF64: sitofp_double_i32
58 %b.addr = alloca double, align 8
59 %conv = sitofp i32 %a to double
60; ELF64: std
61; ELF64: lfiwax
62; ELF64: fcfid
63 store double %conv, double* %b.addr, align 8
64 ret void
65}
66
67define void @sitofp_double_i64(i64 %a, double %b) nounwind ssp {
68entry:
69; ELF64: sitofp_double_i64
70 %b.addr = alloca double, align 8
71 %conv = sitofp i64 %a to double
72; ELF64: std
73; ELF64: lfd
74; ELF64: fcfid
75 store double %conv, double* %b.addr, align 8
76 ret void
77}
78
79define void @sitofp_double_i16(i16 %a, double %b) nounwind ssp {
80entry:
81; ELF64: sitofp_double_i16
82 %b.addr = alloca double, align 8
83 %conv = sitofp i16 %a to double
84; ELF64: extsh
85; ELF64: std
86; ELF64: lfd
87; ELF64: fcfid
88 store double %conv, double* %b.addr, align 8
89 ret void
90}
91
92define void @sitofp_double_i8(i8 %a, double %b) nounwind ssp {
93entry:
94; ELF64: sitofp_double_i8
95 %b.addr = alloca double, align 8
96 %conv = sitofp i8 %a to double
97; ELF64: extsb
98; ELF64: std
99; ELF64: lfd
100; ELF64: fcfid
101 store double %conv, double* %b.addr, align 8
102 ret void
103}
104
105; Test uitofp
106
107define void @uitofp_single_i64(i64 %a, float %b) nounwind ssp {
108entry:
109; ELF64: uitofp_single_i64
110 %b.addr = alloca float, align 4
111 %conv = uitofp i64 %a to float
112; ELF64: std
113; ELF64: lfd
114; ELF64: fcfidus
115 store float %conv, float* %b.addr, align 4
116 ret void
117}
118
119define void @uitofp_single_i32(i32 %a, float %b) nounwind ssp {
120entry:
121; ELF64: uitofp_single_i32
122 %b.addr = alloca float, align 4
123 %conv = uitofp i32 %a to float
124; ELF64: std
125; ELF64: lfiwzx
126; ELF64: fcfidus
127 store float %conv, float* %b.addr, align 4
128 ret void
129}
130
131define void @uitofp_single_i16(i16 %a, float %b) nounwind ssp {
132entry:
133; ELF64: uitofp_single_i16
134 %b.addr = alloca float, align 4
135 %conv = uitofp i16 %a to float
136; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
137; ELF64: std
138; ELF64: lfd
139; ELF64: fcfidus
140 store float %conv, float* %b.addr, align 4
141 ret void
142}
143
144define void @uitofp_single_i8(i8 %a) nounwind ssp {
145entry:
146; ELF64: uitofp_single_i8
147 %b.addr = alloca float, align 4
148 %conv = uitofp i8 %a to float
149; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
150; ELF64: std
151; ELF64: lfd
152; ELF64: fcfidus
153 store float %conv, float* %b.addr, align 4
154 ret void
155}
156
157define void @uitofp_double_i64(i64 %a, double %b) nounwind ssp {
158entry:
159; ELF64: uitofp_double_i64
160 %b.addr = alloca double, align 8
161 %conv = uitofp i64 %a to double
162; ELF64: std
163; ELF64: lfd
164; ELF64: fcfidu
165 store double %conv, double* %b.addr, align 8
166 ret void
167}
168
169define void @uitofp_double_i32(i32 %a, double %b) nounwind ssp {
170entry:
171; ELF64: uitofp_double_i32
172 %b.addr = alloca double, align 8
173 %conv = uitofp i32 %a to double
174; ELF64: std
175; ELF64: lfiwzx
176; ELF64: fcfidu
177 store double %conv, double* %b.addr, align 8
178 ret void
179}
180
181define void @uitofp_double_i16(i16 %a, double %b) nounwind ssp {
182entry:
183; ELF64: uitofp_double_i16
184 %b.addr = alloca double, align 8
185 %conv = uitofp i16 %a to double
186; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
187; ELF64: std
188; ELF64: lfd
189; ELF64: fcfidu
190 store double %conv, double* %b.addr, align 8
191 ret void
192}
193
194define void @uitofp_double_i8(i8 %a, double %b) nounwind ssp {
195entry:
196; ELF64: uitofp_double_i8
197 %b.addr = alloca double, align 8
198 %conv = uitofp i8 %a to double
199; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
200; ELF64: std
201; ELF64: lfd
202; ELF64: fcfidu
203 store double %conv, double* %b.addr, align 8
204 ret void
205}
206
207; Test fptosi
208
209define void @fptosi_float_i32(float %a) nounwind ssp {
210entry:
211; ELF64: fptosi_float_i32
212 %b.addr = alloca i32, align 4
213 %conv = fptosi float %a to i32
214; ELF64: fctiwz
215; ELF64: stfd
216; ELF64: lwa
217 store i32 %conv, i32* %b.addr, align 4
218 ret void
219}
220
221define void @fptosi_float_i64(float %a) nounwind ssp {
222entry:
223; ELF64: fptosi_float_i64
224 %b.addr = alloca i64, align 4
225 %conv = fptosi float %a to i64
226; ELF64: fctidz
227; ELF64: stfd
228; ELF64: ld
229 store i64 %conv, i64* %b.addr, align 4
230 ret void
231}
232
233define void @fptosi_double_i32(double %a) nounwind ssp {
234entry:
235; ELF64: fptosi_double_i32
236 %b.addr = alloca i32, align 8
237 %conv = fptosi double %a to i32
238; ELF64: fctiwz
239; ELF64: stfd
240; ELF64: lwa
241 store i32 %conv, i32* %b.addr, align 8
242 ret void
243}
244
245define void @fptosi_double_i64(double %a) nounwind ssp {
246entry:
247; ELF64: fptosi_double_i64
248 %b.addr = alloca i64, align 8
249 %conv = fptosi double %a to i64
250; ELF64: fctidz
251; ELF64: stfd
252; ELF64: ld
253 store i64 %conv, i64* %b.addr, align 8
254 ret void
255}
256
257; Test fptoui
258
259define void @fptoui_float_i32(float %a) nounwind ssp {
260entry:
261; ELF64: fptoui_float_i32
262 %b.addr = alloca i32, align 4
263 %conv = fptoui float %a to i32
264; ELF64: fctiwuz
265; ELF64: stfd
266; ELF64: lwz
267 store i32 %conv, i32* %b.addr, align 4
268 ret void
269}
270
271define void @fptoui_float_i64(float %a) nounwind ssp {
272entry:
273; ELF64: fptoui_float_i64
274 %b.addr = alloca i64, align 4
275 %conv = fptoui float %a to i64
276; ELF64: fctiduz
277; ELF64: stfd
278; ELF64: ld
279 store i64 %conv, i64* %b.addr, align 4
280 ret void
281}
282
283define void @fptoui_double_i32(double %a) nounwind ssp {
284entry:
285; ELF64: fptoui_double_i32
286 %b.addr = alloca i32, align 8
287 %conv = fptoui double %a to i32
288; ELF64: fctiwuz
289; ELF64: stfd
290; ELF64: lwz
291 store i32 %conv, i32* %b.addr, align 8
292 ret void
293}
294
295define void @fptoui_double_i64(double %a) nounwind ssp {
296entry:
297; ELF64: fptoui_double_i64
298 %b.addr = alloca i64, align 8
299 %conv = fptoui double %a to i64
300; ELF64: fctiduz
301; ELF64: stfd
302; ELF64: ld
303 store i64 %conv, i64* %b.addr, align 8
304 ret void
305}