| Hal Finkel | 9887ec3 | 2013-03-18 17:40:44 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -mcpu=a2 | FileCheck %s |
| Hal Finkel | 9f2518c | 2013-03-18 23:58:28 +0000 | [diff] [blame] | 2 | ; RUN: llc < %s -mcpu=a2 -disable-lsr | FileCheck -check-prefix=NOLSR %s |
| Hal Finkel | 9887ec3 | 2013-03-18 17:40:44 +0000 | [diff] [blame] | 3 | target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" |
| 4 | target triple = "powerpc64-unknown-linux-gnu" |
| 5 | |
| 6 | define void @main() #0 { |
| 7 | entry: |
| 8 | br i1 undef, label %for.end, label %for.body |
| 9 | |
| 10 | for.body: ; preds = %for.body, %entry |
| 11 | %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ] |
| 12 | %indvars.iv.next = add i64 %indvars.iv, 1 |
| 13 | %lftr.wideiv = trunc i64 %indvars.iv.next to i32 |
| 14 | %exitcond = icmp eq i32 %lftr.wideiv, 0 |
| 15 | br i1 %exitcond, label %for.end, label %for.body |
| 16 | |
| Hal Finkel | 9887ec3 | 2013-03-18 17:40:44 +0000 | [diff] [blame] | 17 | ; CHECK: @main |
| Hal Finkel | b1fd3cd | 2013-05-15 21:37:41 +0000 | [diff] [blame] | 18 | ; CHECK: li [[REG:[0-9]+]], 0 |
| 19 | ; CHECK: oris [[REG2:[0-9]+]], [[REG]], 65535 |
| 20 | ; CHECK: ori [[REG3:[0-9]+]], [[REG2]], 65535 |
| 21 | ; CHECK: mtctr [[REG3]] |
| 22 | ; CHECK: bdnz |
| Hal Finkel | 9887ec3 | 2013-03-18 17:40:44 +0000 | [diff] [blame] | 23 | |
| 24 | for.end: ; preds = %for.body, %entry |
| 25 | ret void |
| 26 | } |
| 27 | |
| 28 | define void @main1() #0 { |
| 29 | entry: |
| 30 | br i1 undef, label %for.end, label %for.body |
| 31 | |
| 32 | for.body: ; preds = %for.body, %entry |
| 33 | %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ] |
| 34 | %indvars.iv.next = add i64 %indvars.iv, 1 |
| 35 | %exitcond = icmp eq i64 %indvars.iv.next, 0 |
| 36 | br i1 %exitcond, label %for.end, label %for.body |
| 37 | |
| 38 | ; CHECK: @main1 |
| 39 | ; CHECK: li [[REG:[0-9]+]], -1 |
| 40 | ; CHECK: mtctr [[REG]] |
| 41 | ; CHECK: bdnz |
| 42 | |
| 43 | for.end: ; preds = %for.body, %entry |
| 44 | ret void |
| 45 | } |
| 46 | |
| 47 | define void @main2() #0 { |
| 48 | entry: |
| 49 | br i1 undef, label %for.end, label %for.body |
| 50 | |
| 51 | for.body: ; preds = %for.body, %entry |
| 52 | %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ] |
| 53 | %indvars.iv.next = add i64 %indvars.iv, 1 |
| 54 | %exitcond = icmp eq i64 %indvars.iv.next, -100000 |
| 55 | br i1 %exitcond, label %for.end, label %for.body |
| 56 | |
| 57 | ; CHECK: @main2 |
| 58 | ; CHECK: lis [[REG:[0-9]+]], -2 |
| 59 | ; CHECK: ori [[REG2:[0-9]+]], [[REG]], 31071 |
| 60 | ; CHECK: mtctr [[REG2]] |
| 61 | ; CHECK: bdnz |
| 62 | |
| 63 | for.end: ; preds = %for.body, %entry |
| 64 | ret void |
| 65 | } |
| 66 | |
| Hal Finkel | 9f2518c | 2013-03-18 23:58:28 +0000 | [diff] [blame] | 67 | define void @main3() #0 { |
| 68 | entry: |
| 69 | br i1 undef, label %for.end, label %for.body |
| 70 | |
| 71 | for.body: ; preds = %for.body, %entry |
| 72 | %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 127984, %entry ] |
| 73 | %indvars.iv.next = add i64 %indvars.iv, -16 |
| 74 | %exitcond = icmp eq i64 %indvars.iv.next, -16 |
| 75 | br i1 %exitcond, label %for.end, label %for.body |
| 76 | |
| 77 | ; NOLSR: @main3 |
| 78 | ; NOLSR: li [[REG:[0-9]+]], 8000 |
| 79 | ; NOLSR: mtctr [[REG]] |
| 80 | ; NOLSR: bdnz |
| 81 | |
| 82 | for.end: ; preds = %for.body, %entry |
| 83 | ret void |
| 84 | } |
| 85 | |
| Bill Wendling | 80075c4 | 2013-08-22 21:28:54 +0000 | [diff] [blame] | 86 | attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } |