blob: 9f29e31cb9024deec16b18b248bb8763df6ea6dc [file] [log] [blame]
Hal Finkel08a215c2013-03-18 23:00:58 +00001; RUN: llc < %s -mcpu=pwr7 | FileCheck %s
2target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
3target triple = "powerpc64-unknown-linux-gnu"
4
5define fastcc void @copy_to_conceal() #0 {
6entry:
7 br i1 undef, label %if.then, label %if.end210
8
9if.then: ; preds = %entry
10 br label %vector.body.i
11
12vector.body.i: ; preds = %vector.body.i, %if.then
13 %index.i = phi i64 [ 0, %vector.body.i ], [ 0, %if.then ]
14 store <8 x i16> zeroinitializer, <8 x i16>* undef, align 2
15 br label %vector.body.i
16
17if.end210: ; preds = %entry
18 ret void
19
Hal Finkelec2e9682013-03-19 15:23:39 +000020; This will generate two align-1 i64 stores. Make sure that they are
21; indexed stores and not in r+i form (which require the offset to be
22; a multiple of 4).
Hal Finkel08a215c2013-03-18 23:00:58 +000023; CHECK: @copy_to_conceal
24; CHECK: stdx {{[0-9]+}}, 0,
25}
26
Bill Wendling80075c42013-08-22 21:28:54 +000027attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }