| Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame^] | 1 | //===- PowerPCInstrInfo.h - PowerPC Instruction Information -----*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the LLVM research group and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains the PowerPC implementation of the TargetInstrInfo class. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef POWERPCINSTRUCTIONINFO_H |
| 15 | #define POWERPCINSTRUCTIONINFO_H |
| 16 | |
| 17 | #include "llvm/Target/TargetInstrInfo.h" |
| 18 | #include "PowerPCRegisterInfo.h" |
| 19 | |
| 20 | namespace llvm { |
| 21 | |
| 22 | namespace PPC32II { |
| 23 | enum { |
| 24 | ArgCountShift = 0, |
| 25 | ArgCountMask = 7, |
| 26 | |
| 27 | Arg0TypeShift = 3, |
| 28 | Arg1TypeShift = 8, |
| 29 | Arg2TypeShift = 13, |
| 30 | Arg3TypeShift = 18, |
| 31 | Arg4TypeShift = 23, |
| 32 | VMX = 1<<28, |
| 33 | PPC64 = 1<<29, |
| 34 | ArgTypeMask = 31 |
| 35 | }; |
| 36 | |
| 37 | enum { |
| 38 | None = 0, |
| 39 | Gpr = 1, |
| 40 | Gpr0 = 2, |
| 41 | Simm16 = 3, |
| 42 | Zimm16 = 4, |
| 43 | PCRelimm24 = 5, |
| 44 | Imm24 = 6, |
| 45 | Imm5 = 7, |
| 46 | PCRelimm14 = 8, |
| 47 | Imm14 = 9, |
| 48 | Imm2 = 10, |
| 49 | Crf = 11, |
| 50 | Imm3 = 12, |
| 51 | Imm1 = 13, |
| 52 | Fpr = 14, |
| 53 | Imm4 = 15, |
| 54 | Imm8 = 16, |
| 55 | Disimm16 = 17, |
| 56 | Disimm14 = 18, |
| 57 | Spr = 19, |
| 58 | Sgr = 20, |
| 59 | Imm15 = 21, |
| 60 | Vpr = 22 |
| 61 | }; |
| 62 | } |
| 63 | |
| 64 | class PowerPCInstrInfo : public TargetInstrInfo { |
| 65 | const PowerPCRegisterInfo RI; |
| 66 | public: |
| 67 | PowerPCInstrInfo(); |
| 68 | |
| 69 | /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As |
| 70 | /// such, whenever a client has an instance of instruction info, it should |
| 71 | /// always be able to get register info as well (through this method). |
| 72 | /// |
| 73 | virtual const MRegisterInfo &getRegisterInfo() const { return RI; } |
| 74 | }; |
| 75 | |
| 76 | } |
| 77 | |
| 78 | #endif |