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Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +00001//===---- LiveRangeEdit.h - Basic tools for split and spill -----*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// The LiveRangeEdit class represents changes done to a virtual register when it
11// is spilled or split.
12//
13// The parent register is never changed. Instead, a number of new virtual
14// registers are created and added to the newRegs vector.
15//
16//===----------------------------------------------------------------------===//
17
18#ifndef LLVM_CODEGEN_LIVERANGEEDIT_H
19#define LLVM_CODEGEN_LIVERANGEEDIT_H
20
21#include "llvm/CodeGen/LiveInterval.h"
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +000022#include "llvm/ADT/SmallPtrSet.h"
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +000023
24namespace llvm {
25
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +000026class AliasAnalysis;
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +000027class LiveIntervals;
Jakob Stoklund Olesen6094bd82011-03-29 21:20:19 +000028class MachineLoopInfo;
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +000029class MachineRegisterInfo;
30class VirtRegMap;
31
32class LiveRangeEdit {
Jakob Stoklund Olesen92a55f42011-03-09 00:57:29 +000033public:
34 /// Callback methods for LiveRangeEdit owners.
35 struct Delegate {
36 /// Called immediately before erasing a dead machine instruction.
37 virtual void LRE_WillEraseInstruction(MachineInstr *MI) {}
Jakob Stoklund Olesen7792e982011-03-13 01:23:11 +000038
39 /// Called when a virtual register is no longer used. Return false to defer
40 /// its deletion from LiveIntervals.
41 virtual bool LRE_CanEraseVirtReg(unsigned) { return true; }
42
Jakob Stoklund Olesen1d5b8452011-03-16 22:56:16 +000043 /// Called before shrinking the live range of a virtual register.
44 virtual void LRE_WillShrinkVirtReg(unsigned) {}
45
Matt Beaumont-Gayab2ee2e2011-03-09 04:02:15 +000046 virtual ~Delegate() {}
Jakob Stoklund Olesen92a55f42011-03-09 00:57:29 +000047 };
48
49private:
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +000050 LiveInterval &parent_;
51 SmallVectorImpl<LiveInterval*> &newRegs_;
Jakob Stoklund Olesen92a55f42011-03-09 00:57:29 +000052 Delegate *const delegate_;
Jakob Stoklund Olesen1973b3e2011-03-07 22:42:16 +000053 const SmallVectorImpl<LiveInterval*> *uselessRegs_;
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +000054
55 /// firstNew_ - Index of the first register added to newRegs_.
56 const unsigned firstNew_;
57
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +000058 /// scannedRemattable_ - true when remattable values have been identified.
59 bool scannedRemattable_;
60
61 /// remattable_ - Values defined by remattable instructions as identified by
62 /// tii.isTriviallyReMaterializable().
Jakob Stoklund Olesen46703532011-03-02 23:05:19 +000063 SmallPtrSet<const VNInfo*,4> remattable_;
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +000064
65 /// rematted_ - Values that were actually rematted, and so need to have their
66 /// live range trimmed or entirely removed.
Jakob Stoklund Olesen46703532011-03-02 23:05:19 +000067 SmallPtrSet<const VNInfo*,4> rematted_;
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +000068
69 /// scanRemattable - Identify the parent_ values that may rematerialize.
70 void scanRemattable(LiveIntervals &lis,
71 const TargetInstrInfo &tii,
72 AliasAnalysis *aa);
73
74 /// allUsesAvailableAt - Return true if all registers used by OrigMI at
75 /// OrigIdx are also available with the same value at UseIdx.
76 bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
77 SlotIndex UseIdx, LiveIntervals &lis);
78
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +000079public:
80 /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
81 /// @param parent The register being spilled or split.
82 /// @param newRegs List to receive any new registers created. This needn't be
83 /// empty initially, any existing registers are ignored.
84 /// @param uselessRegs List of registers that can't be used when
85 /// rematerializing values because they are about to be removed.
86 LiveRangeEdit(LiveInterval &parent,
87 SmallVectorImpl<LiveInterval*> &newRegs,
Jakob Stoklund Olesen47dbf6c2011-03-10 01:51:42 +000088 Delegate *delegate = 0,
Jakob Stoklund Olesen1973b3e2011-03-07 22:42:16 +000089 const SmallVectorImpl<LiveInterval*> *uselessRegs = 0)
Jakob Stoklund Olesen92a55f42011-03-09 00:57:29 +000090 : parent_(parent), newRegs_(newRegs),
91 delegate_(delegate),
92 uselessRegs_(uselessRegs),
93 firstNew_(newRegs.size()),
94 scannedRemattable_(false) {}
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +000095
96 LiveInterval &getParent() const { return parent_; }
97 unsigned getReg() const { return parent_.reg; }
98
99 /// Iterator for accessing the new registers added by this edit.
100 typedef SmallVectorImpl<LiveInterval*>::const_iterator iterator;
101 iterator begin() const { return newRegs_.begin()+firstNew_; }
102 iterator end() const { return newRegs_.end(); }
Jakob Stoklund Olesen3a0e0712010-10-26 22:36:09 +0000103 unsigned size() const { return newRegs_.size()-firstNew_; }
Eric Christopher0f438112011-02-03 06:18:29 +0000104 bool empty() const { return size() == 0; }
Jakob Stoklund Olesendb4eec32010-10-29 18:21:18 +0000105 LiveInterval *get(unsigned idx) const { return newRegs_[idx+firstNew_]; }
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +0000106
Jakob Stoklund Olesen47dbf6c2011-03-10 01:51:42 +0000107 /// FIXME: Temporary accessors until we can get rid of
108 /// LiveIntervals::AddIntervalsForSpills
109 SmallVectorImpl<LiveInterval*> *getNewVRegs() { return &newRegs_; }
110 const SmallVectorImpl<LiveInterval*> *getUselessVRegs() {
111 return uselessRegs_;
112 }
113
Jakob Stoklund Olesene9c50732011-03-26 22:16:41 +0000114 /// createFrom - Create a new virtual register based on OldReg.
115 LiveInterval &createFrom(unsigned OldReg, LiveIntervals&, VirtRegMap&);
116
Jakob Stoklund Olesen6a3dbd32011-03-17 20:37:07 +0000117 /// create - Create a new register with the same class and original slot as
Jakob Stoklund Olesen2a0180f2010-10-15 00:16:55 +0000118 /// parent.
Jakob Stoklund Olesen6a3dbd32011-03-17 20:37:07 +0000119 LiveInterval &create(LiveIntervals &LIS, VirtRegMap &VRM) {
120 return createFrom(getReg(), LIS, VRM);
121 }
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +0000122
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +0000123 /// anyRematerializable - Return true if any parent values may be
124 /// rematerializable.
Jakob Stoklund Olesen1973b3e2011-03-07 22:42:16 +0000125 /// This function must be called before any rematerialization is attempted.
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +0000126 bool anyRematerializable(LiveIntervals&, const TargetInstrInfo&,
127 AliasAnalysis*);
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +0000128
Jakob Stoklund Olesen2ef661b2011-03-29 03:12:02 +0000129 /// checkRematerializable - Manually add VNI to the list of rematerializable
130 /// values if DefMI may be rematerializable.
131 void checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI,
132 const TargetInstrInfo&, AliasAnalysis*);
133
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +0000134 /// Remat - Information needed to rematerialize at a specific location.
135 struct Remat {
136 VNInfo *ParentVNI; // parent_'s value at the remat location.
137 MachineInstr *OrigMI; // Instruction defining ParentVNI.
Jakob Stoklund Olesenb80e9732010-11-10 01:05:12 +0000138 explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(0) {}
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +0000139 };
140
141 /// canRematerializeAt - Determine if ParentVNI can be rematerialized at
142 /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
143 /// When cheapAsAMove is set, only cheap remats are allowed.
Jakob Stoklund Olesenb80e9732010-11-10 01:05:12 +0000144 bool canRematerializeAt(Remat &RM,
145 SlotIndex UseIdx,
146 bool cheapAsAMove,
147 LiveIntervals &lis);
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +0000148
149 /// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an
150 /// instruction into MBB before MI. The new instruction is mapped, but
151 /// liveness is not updated.
152 /// Return the SlotIndex of the new instruction.
153 SlotIndex rematerializeAt(MachineBasicBlock &MBB,
154 MachineBasicBlock::iterator MI,
155 unsigned DestReg,
156 const Remat &RM,
157 LiveIntervals&,
158 const TargetInstrInfo&,
159 const TargetRegisterInfo&);
160
Jakob Stoklund Olesen83d1ba52010-12-18 03:04:14 +0000161 /// markRematerialized - explicitly mark a value as rematerialized after doing
162 /// it manually.
Jakob Stoklund Olesen46703532011-03-02 23:05:19 +0000163 void markRematerialized(const VNInfo *ParentVNI) {
Jakob Stoklund Olesen83d1ba52010-12-18 03:04:14 +0000164 rematted_.insert(ParentVNI);
165 }
166
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +0000167 /// didRematerialize - Return true if ParentVNI was rematerialized anywhere.
Jakob Stoklund Olesen46703532011-03-02 23:05:19 +0000168 bool didRematerialize(const VNInfo *ParentVNI) const {
Jakob Stoklund Olesen080c3162010-10-20 22:00:51 +0000169 return rematted_.count(ParentVNI);
170 }
Jakob Stoklund Olesen58817992011-03-08 22:46:11 +0000171
Jakob Stoklund Olesen7792e982011-03-13 01:23:11 +0000172 /// eraseVirtReg - Notify the delegate that Reg is no longer in use, and try
173 /// to erase it from LIS.
174 void eraseVirtReg(unsigned Reg, LiveIntervals &LIS);
175
Jakob Stoklund Olesen58817992011-03-08 22:46:11 +0000176 /// eliminateDeadDefs - Try to delete machine instructions that are now dead
177 /// (allDefsAreDead returns true). This may cause live intervals to be trimmed
178 /// and further dead efs to be eliminated.
179 void eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
Jakob Stoklund Olesen6a3dbd32011-03-17 20:37:07 +0000180 LiveIntervals&, VirtRegMap&,
Jakob Stoklund Olesen58817992011-03-08 22:46:11 +0000181 const TargetInstrInfo&);
182
Jakob Stoklund Olesen6094bd82011-03-29 21:20:19 +0000183 /// calculateRegClassAndHint - Recompute register class and hint for each new
184 /// register.
185 void calculateRegClassAndHint(MachineFunction&, LiveIntervals&,
186 const MachineLoopInfo&);
Jakob Stoklund Olesena17768f2010-10-14 23:49:52 +0000187};
188
189}
190
191#endif