| Brian Gaeke | e993d20 | 2004-05-14 19:50:33 +0000 | [diff] [blame] | 1 | |
| 2 | =pod |
| 3 | |
| 4 | =head1 NAME |
| 5 | |
| 6 | llc - LLVM static compiler |
| 7 | |
| 8 | =head1 SYNOPSIS |
| 9 | |
| 10 | llc [options] [filename] |
| 11 | |
| 12 | =head1 DESCRIPTION |
| 13 | |
| 14 | The B<llc> command compiles LLVM bytecode into assembly language for a |
| 15 | specified architecture. The assembly language output can then be passed through |
| 16 | a native assembler and linker to generate native code. |
| 17 | |
| 18 | The choice of architecture for the output assembly code is determined as |
| 19 | follows, by attempting to satisfy each of the following rules in turn (first |
| 20 | one wins): |
| 21 | |
| 22 | =over |
| 23 | |
| 24 | =item * |
| 25 | |
| 26 | If the user has specified an architecture with the -m option, use that |
| 27 | architecture. |
| 28 | |
| 29 | =item * |
| 30 | |
| 31 | Examine the input LLVM bytecode file: if it is little endian and has a |
| 32 | pointer size of 32 bits, select the Intel IA-32 architecture. If it is big |
| 33 | endian and has a pointer size of 64 bits, select the SparcV9 architecture. |
| 34 | |
| 35 | =item * |
| 36 | |
| 37 | If B<llc> was compiled on an architecture for which it can generate code, select |
| 38 | the architecture upon which B<llc> was compiled. |
| 39 | |
| 40 | =item * |
| 41 | |
| 42 | Exit with an error message telling the user to specify the output |
| 43 | architecture explicitly. |
| 44 | |
| 45 | =back |
| 46 | |
| 47 | =head1 OPTIONS |
| 48 | |
| 49 | If I<filename> is - or omitted, B<llc> reads LLVM bytecode from standard input. |
| 50 | Otherwise, it will read LLVM bytecode from I<filename>. |
| 51 | |
| 52 | If the B<-o> option is omitted, then B<llc> will send its output to standard |
| 53 | output if the input is from standard input. If the B<-o> option specifies -, |
| 54 | then the output will also be sent to standard output. |
| 55 | |
| 56 | If no B<-o> option is specified and an input file other than - is specified, |
| 57 | then B<llc> creates the output filename by taking the input filename, |
| 58 | removing any existing F<.bc> extension, and adding a F<.s> suffix. |
| 59 | |
| 60 | Other B<llc> options are as follows: |
| 61 | |
| 62 | =over |
| 63 | |
| 64 | =item B<-f> |
| 65 | |
| 66 | Overwrite output files. By default, B<llc> will refuse to overwrite |
| 67 | an output file which already exists. |
| 68 | |
| 69 | =item B<-march>=I<arch> |
| 70 | |
| 71 | Specify the architecture for which to generate assembly. Valid |
| 72 | architectures are: |
| 73 | |
| 74 | =over |
| 75 | |
| 76 | =item I<x86> |
| 77 | |
| 78 | Intel IA-32 (Pentium and above) |
| 79 | |
| 80 | =item I<sparcv9> |
| 81 | |
| 82 | 64-bit SPARC V9 |
| 83 | |
| 84 | =item I<c> |
| 85 | |
| 86 | Emit C code, not assembly |
| 87 | |
| 88 | =back |
| 89 | |
| 90 | =item B<-enable-correct-eh-support> |
| 91 | |
| 92 | Instruct the B<-lowerinvoke> pass to insert code for correct exception handling |
| 93 | support. This is expensive and is by default omitted for efficiency. |
| 94 | |
| 95 | =item B<-help> |
| 96 | |
| 97 | Print a summary of command line options. |
| 98 | |
| 99 | =item B<-stats> |
| 100 | |
| 101 | Print statistics recorded by code-generation passes. |
| 102 | |
| 103 | =item B<-time-passes> |
| 104 | |
| 105 | Record the amount of time needed for each pass and print a report to standard |
| 106 | error. |
| 107 | |
| 108 | =back |
| 109 | |
| 110 | =head2 Intel IA-32-specific Options |
| 111 | |
| 112 | =over |
| 113 | |
| 114 | =item B<--disable-fp-elim> |
| 115 | |
| 116 | Disable frame pointer elimination optimization. |
| 117 | |
| 118 | =item B<--disable-pattern-isel> |
| 119 | |
| 120 | Use the 'simple' X86 instruction selector (the default). |
| 121 | |
| 122 | =item B<--print-machineinstrs> |
| 123 | |
| 124 | Print generated machine code. |
| 125 | |
| 126 | =item B<--regalloc>=I<allocator> |
| 127 | |
| 128 | Specify the register allocator to use. The default I<allocator> is I<local>. |
| 129 | Valid register allocators are: |
| 130 | |
| 131 | =over |
| 132 | |
| 133 | =item I<simple> |
| 134 | |
| 135 | Very simple "always spill" register allocator |
| 136 | |
| 137 | =item I<local> |
| 138 | |
| 139 | Local register allocator |
| 140 | |
| 141 | =item I<linearscan> |
| 142 | |
| 143 | Linear scan global register allocator (experimental) |
| 144 | |
| 145 | =back |
| 146 | |
| 147 | =item B<--spiller>=I<spiller> |
| 148 | |
| 149 | Specify the spiller to use for register allocators that support it. Currently |
| 150 | this option is used only by the linear scan register allocator. The default |
| 151 | I<spiller> is I<local>. Valid spillers are: |
| 152 | |
| 153 | =over |
| 154 | |
| 155 | =item I<simple> |
| 156 | |
| 157 | Simple spiller |
| 158 | |
| 159 | =item I<local> |
| 160 | |
| 161 | Local spiller |
| 162 | |
| 163 | =back |
| 164 | |
| 165 | =back |
| 166 | |
| 167 | =head2 SPARCV9-specific Options |
| 168 | |
| 169 | =over |
| 170 | |
| 171 | =item B<--disable-peephole> |
| 172 | |
| 173 | Disable peephole optimization pass. |
| 174 | |
| 175 | =item B<--disable-sched> |
| 176 | |
| 177 | Disable local scheduling pass. |
| 178 | |
| 179 | =item B<--disable-strip> |
| 180 | |
| 181 | The Sparc backend embeds the LLVM bytecode into the assembly output. This |
| 182 | option requests that symbol names be retained; by default, they are stripped out. |
| 183 | |
| 184 | =item B<--enable-maps> |
| 185 | |
| 186 | Emit LLVM-to-machine code mapping information into the assembly output. |
| 187 | |
| 188 | =back |
| 189 | |
| 190 | =head1 EXIT STATUS |
| 191 | |
| 192 | If B<llc> succeeds, it will exit with 0. Otherwise, if an error occurs, |
| 193 | it will exit with a non-zero value. |
| 194 | |
| 195 | =head1 SEE ALSO |
| 196 | |
| 197 | L<lli> |
| 198 | |
| 199 | =head1 AUTHORS |
| 200 | |
| 201 | Maintained by the LLVM Team (L<http://llvm.cs.uiuc.edu>). |
| 202 | |
| 203 | =cut |
| 204 | |