Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 1 | // $Id$ |
| 2 | //*************************************************************************** |
| 3 | // File: |
| 4 | // MachineInstr.cpp |
| 5 | // |
| 6 | // Purpose: |
| 7 | // |
| 8 | // |
| 9 | // Strategy: |
| 10 | // |
| 11 | // History: |
| 12 | // 7/2/01 - Vikram Adve - Created |
| 13 | //**************************************************************************/ |
| 14 | |
Vikram S. Adve | 5b79591 | 2001-08-28 23:02:39 +0000 | [diff] [blame] | 15 | |
Chris Lattner | 822b4fb | 2001-09-07 17:18:30 +0000 | [diff] [blame] | 16 | #include "llvm/CodeGen/MachineInstr.h" |
Vikram S. Adve | 6e44718 | 2001-09-18 12:56:28 +0000 | [diff] [blame] | 17 | #include "llvm/Target/MachineRegInfo.h" |
Vikram S. Adve | 5b79591 | 2001-08-28 23:02:39 +0000 | [diff] [blame] | 18 | #include "llvm/Method.h" |
Chris Lattner | 68498ce | 2001-07-21 23:24:48 +0000 | [diff] [blame] | 19 | #include "llvm/Instruction.h" |
Vikram S. Adve | 5b79591 | 2001-08-28 23:02:39 +0000 | [diff] [blame] | 20 | |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 21 | |
| 22 | //************************ Class Implementations **************************/ |
| 23 | |
Vikram S. Adve | 1885da4 | 2001-07-31 21:49:28 +0000 | [diff] [blame] | 24 | // Constructor for instructions with fixed #operands (nearly all) |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 25 | MachineInstr::MachineInstr(MachineOpCode _opCode, |
| 26 | OpCodeMask _opCodeMask) |
| 27 | : opCode(_opCode), |
| 28 | opCodeMask(_opCodeMask), |
Vikram S. Adve | 6a175e0 | 2001-07-28 04:06:37 +0000 | [diff] [blame] | 29 | operands(TargetInstrDescriptors[_opCode].numOperands) |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 30 | { |
Vikram S. Adve | 1885da4 | 2001-07-31 21:49:28 +0000 | [diff] [blame] | 31 | assert(TargetInstrDescriptors[_opCode].numOperands >= 0); |
| 32 | } |
| 33 | |
| 34 | // Constructor for instructions with variable #operands |
| 35 | MachineInstr::MachineInstr(MachineOpCode _opCode, |
| 36 | unsigned numOperands, |
| 37 | OpCodeMask _opCodeMask) |
| 38 | : opCode(_opCode), |
| 39 | opCodeMask(_opCodeMask), |
| 40 | operands(numOperands) |
| 41 | { |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 42 | } |
| 43 | |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 44 | void |
| 45 | MachineInstr::SetMachineOperand(unsigned int i, |
| 46 | MachineOperand::MachineOperandType operandType, |
Ruchira Sasanka | 45c171e | 2001-08-07 20:16:52 +0000 | [diff] [blame] | 47 | Value* _val, bool isdef=false) |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 48 | { |
Vikram S. Adve | 6a175e0 | 2001-07-28 04:06:37 +0000 | [diff] [blame] | 49 | assert(i < operands.size()); |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 50 | operands[i].Initialize(operandType, _val); |
Vikram S. Adve | 149977b | 2001-08-13 16:32:45 +0000 | [diff] [blame] | 51 | operands[i].isDef = isdef || |
Vikram S. Adve | 6e44718 | 2001-09-18 12:56:28 +0000 | [diff] [blame] | 52 | TargetInstrDescriptors[opCode].resultPos == (int) i; |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 53 | } |
| 54 | |
| 55 | void |
| 56 | MachineInstr::SetMachineOperand(unsigned int i, |
| 57 | MachineOperand::MachineOperandType operandType, |
Ruchira Sasanka | 45c171e | 2001-08-07 20:16:52 +0000 | [diff] [blame] | 58 | int64_t intValue, bool isdef=false) |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 59 | { |
Vikram S. Adve | 6a175e0 | 2001-07-28 04:06:37 +0000 | [diff] [blame] | 60 | assert(i < operands.size()); |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 61 | operands[i].InitializeConst(operandType, intValue); |
Vikram S. Adve | 149977b | 2001-08-13 16:32:45 +0000 | [diff] [blame] | 62 | operands[i].isDef = isdef || |
Vikram S. Adve | 6e44718 | 2001-09-18 12:56:28 +0000 | [diff] [blame] | 63 | TargetInstrDescriptors[opCode].resultPos == (int) i; |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | void |
| 67 | MachineInstr::SetMachineOperand(unsigned int i, |
Ruchira Sasanka | 45c171e | 2001-08-07 20:16:52 +0000 | [diff] [blame] | 68 | unsigned int regNum, bool isdef=false) |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 69 | { |
Vikram S. Adve | 6a175e0 | 2001-07-28 04:06:37 +0000 | [diff] [blame] | 70 | assert(i < operands.size()); |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 71 | operands[i].InitializeReg(regNum); |
Vikram S. Adve | 149977b | 2001-08-13 16:32:45 +0000 | [diff] [blame] | 72 | operands[i].isDef = isdef || |
Vikram S. Adve | 6e44718 | 2001-09-18 12:56:28 +0000 | [diff] [blame] | 73 | TargetInstrDescriptors[opCode].resultPos == (int) i; |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | void |
Ruchira Sasanka | 0b03c6a | 2001-08-07 21:01:23 +0000 | [diff] [blame] | 77 | MachineInstr::dump(unsigned int indent) const |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 78 | { |
| 79 | for (unsigned i=0; i < indent; i++) |
| 80 | cout << " "; |
| 81 | |
| 82 | cout << *this; |
| 83 | } |
| 84 | |
| 85 | ostream& |
| 86 | operator<< (ostream& os, const MachineInstr& minstr) |
| 87 | { |
Vikram S. Adve | 6a175e0 | 2001-07-28 04:06:37 +0000 | [diff] [blame] | 88 | os << TargetInstrDescriptors[minstr.opCode].opCodeString; |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 89 | |
| 90 | for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++) |
| 91 | os << "\t" << minstr.getOperand(i); |
| 92 | |
Vikram S. Adve | 6a175e0 | 2001-07-28 04:06:37 +0000 | [diff] [blame] | 93 | #undef DEBUG_VAL_OP_ITERATOR |
| 94 | #ifdef DEBUG_VAL_OP_ITERATOR |
| 95 | os << endl << "\tValue operands are: "; |
| 96 | for (MachineInstr::val_op_const_iterator vo(&minstr); ! vo.done(); ++vo) |
| 97 | { |
| 98 | const Value* val = *vo; |
| 99 | os << val << (vo.isDef()? "(def), " : ", "); |
| 100 | } |
Vikram S. Adve | 6a175e0 | 2001-07-28 04:06:37 +0000 | [diff] [blame] | 101 | #endif |
| 102 | |
Vikram S. Adve | 6d35326 | 2001-10-17 23:57:50 +0000 | [diff] [blame^] | 103 | os << endl; |
| 104 | |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 105 | return os; |
| 106 | } |
| 107 | |
Vikram S. Adve | 6e44718 | 2001-09-18 12:56:28 +0000 | [diff] [blame] | 108 | static inline ostream& |
| 109 | OutputOperand(ostream &os, const MachineOperand &mop) |
| 110 | { |
| 111 | switch (mop.getOperandType()) |
| 112 | { |
| 113 | case MachineOperand::MO_CCRegister: |
| 114 | case MachineOperand::MO_VirtualRegister: |
| 115 | return os << "(val " << mop.getVRegValue() << ")"; |
| 116 | case MachineOperand::MO_MachineRegister: |
| 117 | return os << "(" << mop.getMachineRegNum() << ")"; |
| 118 | default: |
| 119 | assert(0 && "Unknown operand type"); |
| 120 | return os; |
| 121 | } |
Chris Lattner | e6fdb11 | 2001-09-09 22:26:29 +0000 | [diff] [blame] | 122 | } |
| 123 | |
| 124 | |
Vikram S. Adve | 6e44718 | 2001-09-18 12:56:28 +0000 | [diff] [blame] | 125 | ostream& |
| 126 | operator<<(ostream &os, const MachineOperand &mop) |
| 127 | { |
| 128 | switch(mop.opType) |
| 129 | { |
| 130 | case MachineOperand::MO_VirtualRegister: |
| 131 | case MachineOperand::MO_MachineRegister: |
| 132 | os << "%reg"; |
| 133 | return OutputOperand(os, mop); |
| 134 | case MachineOperand::MO_CCRegister: |
| 135 | os << "%ccreg"; |
| 136 | return OutputOperand(os, mop); |
| 137 | case MachineOperand::MO_SignExtendedImmed: |
| 138 | return os << mop.immedVal; |
| 139 | case MachineOperand::MO_UnextendedImmed: |
| 140 | return os << mop.immedVal; |
| 141 | case MachineOperand::MO_PCRelativeDisp: |
Vikram S. Adve | e949da5 | 2001-09-30 23:44:19 +0000 | [diff] [blame] | 142 | { |
| 143 | const Value* opVal = mop.getVRegValue(); |
Chris Lattner | 1d87bcf | 2001-10-01 20:11:19 +0000 | [diff] [blame] | 144 | bool isLabel = isa<Method>(opVal) || isa<BasicBlock>(opVal); |
Vikram S. Adve | e949da5 | 2001-09-30 23:44:19 +0000 | [diff] [blame] | 145 | return os << "%disp(" |
| 146 | << (isLabel? "label " : "addr-of-val ") |
| 147 | << opVal << ")"; |
| 148 | } |
Vikram S. Adve | 6e44718 | 2001-09-18 12:56:28 +0000 | [diff] [blame] | 149 | default: |
| 150 | assert(0 && "Unrecognized operand type"); |
| 151 | break; |
| 152 | } |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 153 | |
Vikram S. Adve | 70bc4b5 | 2001-07-21 12:41:50 +0000 | [diff] [blame] | 154 | return os; |
| 155 | } |
| 156 | |
| 157 | |
Vikram S. Adve | 5b79591 | 2001-08-28 23:02:39 +0000 | [diff] [blame] | 158 | void |
Ruchira Sasanka | ed8f674 | 2001-09-15 19:07:45 +0000 | [diff] [blame] | 159 | PrintMachineInstructions(const Method *const method) |
| 160 | { |
| 161 | cout << "\n" << method->getReturnType() |
| 162 | << " \"" << method->getName() << "\"" << endl; |
| 163 | |
| 164 | for (Method::const_iterator BI = method->begin(); BI != method->end(); ++BI) |
| 165 | { |
| 166 | BasicBlock* bb = *BI; |
| 167 | cout << "\n" |
| 168 | << (bb->hasName()? bb->getName() : "Label") |
| 169 | << " (" << bb << ")" << ":" |
| 170 | << endl; |
| 171 | |
| 172 | MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec(); |
| 173 | for (unsigned i=0; i < mvec.size(); i++) |
Vikram S. Adve | 6d35326 | 2001-10-17 23:57:50 +0000 | [diff] [blame^] | 174 | cout << "\t" << *mvec[i]; |
Ruchira Sasanka | ed8f674 | 2001-09-15 19:07:45 +0000 | [diff] [blame] | 175 | } |
| 176 | cout << endl << "End method \"" << method->getName() << "\"" |
| 177 | << endl << endl; |
| 178 | } |