blob: 1f0a240f75ed3c3c84e232789ea6eeb3c8c5570b [file] [log] [blame]
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00001//===-- ARM.h - Top-level interface for ARM representation---- --*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the "Instituto Nokia de Tecnologia" and
6// is distributed under the University of Illinois Open Source
7// License. See LICENSE.TXT for details.
8//
9//===----------------------------------------------------------------------===//
10//
11// This file contains the entry points for global functions defined in the LLVM
12// ARM back-end.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef TARGET_ARM_H
17#define TARGET_ARM_H
18
19#include <iosfwd>
20#include <cassert>
21
22namespace llvm {
Rafael Espindola6f602de2006-08-24 16:13:15 +000023 // Enums corresponding to ARM condition codes
24 namespace ARMCC {
25 enum CondCodes {
26 NE
27 };
28 }
29
30 static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
31 switch (CC) {
32 default: assert(0 && "Unknown condition code");
33 case ARMCC::NE: return "ne";
34 }
35 }
36
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000037 class FunctionPass;
38 class TargetMachine;
39
40 FunctionPass *createARMISelDag(TargetMachine &TM);
41 FunctionPass *createARMCodePrinterPass(std::ostream &OS, TargetMachine &TM);
42} // end namespace llvm;
43
44// Defines symbolic names for ARM registers. This defines a mapping from
45// register name to register number.
46//
47#include "ARMGenRegisterNames.inc"
48
49// Defines symbolic names for the ARM instructions.
50//
51#include "ARMGenInstrNames.inc"
52
53
54#endif