Anton Korobeynikov | f2c3e17 | 2009-05-03 12:57:15 +0000 | [diff] [blame] | 1 | //===- MSP430InstrInfo.h - MSP430 Instruction Information -------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains the MSP430 implementation of the TargetInstrInfo class. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef LLVM_TARGET_MSP430INSTRINFO_H |
| 15 | #define LLVM_TARGET_MSP430INSTRINFO_H |
| 16 | |
| 17 | #include "llvm/Target/TargetInstrInfo.h" |
| 18 | #include "MSP430RegisterInfo.h" |
| 19 | |
| 20 | namespace llvm { |
| 21 | |
| 22 | class MSP430TargetMachine; |
| 23 | |
| 24 | class MSP430InstrInfo : public TargetInstrInfoImpl { |
| 25 | const MSP430RegisterInfo RI; |
| 26 | MSP430TargetMachine &TM; |
| 27 | public: |
| 28 | explicit MSP430InstrInfo(MSP430TargetMachine &TM); |
| 29 | |
| 30 | /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As |
| 31 | /// such, whenever a client has an instance of instruction info, it should |
| 32 | /// always be able to get register info as well (through this method). |
| 33 | /// |
| 34 | virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; } |
Anton Korobeynikov | 1df221f | 2009-05-03 13:02:04 +0000 | [diff] [blame] | 35 | |
| 36 | bool copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, |
| 37 | unsigned DestReg, unsigned SrcReg, |
| 38 | const TargetRegisterClass *DestRC, |
| 39 | const TargetRegisterClass *SrcRC) const; |
| 40 | |
| 41 | bool isMoveInstr(const MachineInstr& MI, |
| 42 | unsigned &SrcReg, unsigned &DstReg, |
| 43 | unsigned &SrcSubIdx, unsigned &DstSubIdx) const; |
Anton Korobeynikov | aa29915 | 2009-05-03 13:09:57 +0000 | [diff] [blame] | 44 | |
| 45 | virtual void storeRegToStackSlot(MachineBasicBlock &MBB, |
| 46 | MachineBasicBlock::iterator MI, |
Anton Korobeynikov | d5047cb | 2009-05-03 13:11:04 +0000 | [diff] [blame] | 47 | unsigned SrcReg, bool isKill, |
| 48 | int FrameIndex, |
Anton Korobeynikov | aa29915 | 2009-05-03 13:09:57 +0000 | [diff] [blame] | 49 | const TargetRegisterClass *RC) const; |
| 50 | virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, |
| 51 | MachineBasicBlock::iterator MI, |
| 52 | unsigned DestReg, int FrameIdx, |
| 53 | const TargetRegisterClass *RC) const; |
Anton Korobeynikov | d5047cb | 2009-05-03 13:11:04 +0000 | [diff] [blame] | 54 | |
| 55 | virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, |
| 56 | MachineBasicBlock::iterator MI, |
| 57 | const std::vector<CalleeSavedInfo> &CSI) const; |
| 58 | virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, |
| 59 | MachineBasicBlock::iterator MI, |
| 60 | const std::vector<CalleeSavedInfo> &CSI) const; |
| 61 | |
Anton Korobeynikov | 90593d2 | 2009-10-21 19:17:18 +0000 | [diff] [blame] | 62 | // Branch folding goodness |
| 63 | bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; |
Anton Korobeynikov | 90593d2 | 2009-10-21 19:17:18 +0000 | [diff] [blame] | 64 | bool isUnpredicatedTerminator(const MachineInstr *MI) const; |
| 65 | bool AnalyzeBranch(MachineBasicBlock &MBB, |
| 66 | MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, |
| 67 | SmallVectorImpl<MachineOperand> &Cond, |
| 68 | bool AllowModify) const; |
| 69 | |
| 70 | unsigned RemoveBranch(MachineBasicBlock &MBB) const; |
| 71 | unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, |
| 72 | MachineBasicBlock *FBB, |
| 73 | const SmallVectorImpl<MachineOperand> &Cond) const; |
Anton Korobeynikov | 8644af3 | 2009-05-03 13:15:22 +0000 | [diff] [blame] | 74 | |
Anton Korobeynikov | f2c3e17 | 2009-05-03 12:57:15 +0000 | [diff] [blame] | 75 | }; |
| 76 | |
| 77 | } |
| 78 | |
| 79 | #endif |