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5 <title>Writing an LLVM backend</title>
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10
11<div class="doc_title">
12 Writing an LLVM backend
13</div>
14
15<ol>
16 <li><a href="#intro">Introduction</a>
17 <li><a href="#backends">Writing a backend</a>
18 <ol>
Chris Lattner7a2fd892004-09-18 06:28:07 +000019 <li><a href="#machine">Machine backends</a>
Misha Brukman8eb67192004-09-06 22:58:13 +000020 <ol>
21 <li><a href="#machineTOC">Outline</a></li>
22 <li><a href="#machineDetails">Implementation details</a></li>
23 </ol></li>
24 <li><a href="#machine">Machine backends</a></li>
25 <li><a href="#lang">Language backends</a></li>
26 </ol></li>
27 <li><a href="#related">Related reading material</a>
28</ol>
29
30<div class="doc_author">
31 <p>Written by <a href="http://misha.brukman.net">Misha Brukman</a></p>
32</div>
33
34<!-- *********************************************************************** -->
35<div class="doc_section">
36 <a name="intro">Introduction</a>
37</div>
38<!-- *********************************************************************** -->
39
40<div class="doc_text">
41
42<p>This document describes techniques for writing backends for LLVM which
43convert the LLVM representation to machine assembly code or other languages.</p>
44
45</div>
46
47<!-- *********************************************************************** -->
48<div class="doc_section">
49 <a name="backends">Writing a backend</a>
50</div>
51<!-- *********************************************************************** -->
52
53<!-- ======================================================================= -->
54<div class="doc_subsection">
55 <a name="machine">Machine backends</a>
56</div>
57
58<!-- _______________________________________________________________________ -->
59<div class="doc_subsubsection">
60 <a name="machineTOC">Outline</a>
61</div>
62
63<div class="doc_text">
64
65<p>In general, you want to follow the format of X86 or PowerPC (in
66<tt>lib/Target</tt>).</p>
67
68<p>To create a static compiler (one that emits text assembly), you need to
69implement the following:</p>
70
71<ul>
72<li>Describe the register set
73 <ul>
74 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
75 the register set and register classes</li>
76 <li>Implement a subclass of <tt><a
77 href="CodeGenerator.html#mregisterinfo">MRegisterInfo</a></tt></li>
78 </ul></li>
79<li>Describe the instruction set
80 <ul>
81 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
82 the instruction set</li>
83 <li>Implement a subclass of <tt><a
84 href="CodeGenerator.html#targetinstrinfo">TargetInstrInfo</a></tt></li>
85 </ul></li>
86<li>Describe the target machine
87 <ul>
88 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
89 the target that describes the pointer size and references the instruction
90 set</li>
91 <li>Implement a subclass of <tt><a
92 href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>, which
93 configures <tt><a href="CodeGenerator.html#targetdata">TargetData</a></tt>
94 correctly</li>
95 </ul></li>
96<li>Implement the assembly printer for the architecture. Usually, if you have
97described the instruction set with the assembly printer generator in mind, that
98step can be almost automated.</li>
99</ul>
100
101<p>Now, for static code generation you also need to write an instruction
102selector for your platform: see <tt>lib/Target/*/*ISelSimple.cpp</tt> which
103is no longer "simple" but it gives you the idea: you have to be able to create
104MachineInstrs for any given LLVM instruction using the <tt>InstVisitor</tt>
105pattern, and produce a <tt>MachineFunction</tt> with
106<tt>MachineBasicBlock</tt>s full of <tt><a
107href="CodeGenerator.html#machineinstr">MachineInstr</a></tt>s for a
108corresponding LLVM Function. Creating an instruction selector is perhaps the
109most time-consuming part of creating a back-end.</p>
110
111<p>To create a JIT for your platform:</p>
112
113<ul>
114<li>Create a subclass of <tt><a
115 href="CodeGenerator.html#targetjitinfo">TargetJITInfo</a></tt></li>
116<li>Create a machine code emitter that will be used to emit binary code
117 directly into memory, given <tt>MachineInstr</tt>s</li>
118</ul>
119
120<p>Note that <tt>lib/target/Skeleton</tt> is a clean skeleton for a new target,
121so you might want to start with that and adapt it for your target, and if you
122are wondering how things are done, peek in the X86 or PowerPC target.</p>
123
124<p>The Skeleton target is non-functional but provides the basic building blocks
125you will need for your endeavor.</p>
126
127</div>
128
129<!-- _______________________________________________________________________ -->
130<div class="doc_subsubsection">
131 <a name="machineDetails">Implementation details</a>
132</div>
133
134<div class="doc_text">
135
136<ul>
137
138<li><p><b>TableGen register info description</b> - describe a class which
139will store the register's number in the binary encoding of the instruction
140(e.g., for JIT purposes).</p>
141
142<p>You also need to define register classes to contain these registers, such as
143the integer register class and floating-point register class, so that you can
144allocate virtual registers to instructions from these sets, and let the
145target-independent register allocator automatically choose the actual
146architected registers.</p>
147
148<div class="doc_code">
149<pre>
150// class Register is defined in Target.td
Chris Lattner7a2fd892004-09-18 06:28:07 +0000151<b>class</b> <em>Target</em>Reg&lt;string name&gt; : Register&lt;name&gt; {
Misha Brukman8eb67192004-09-06 22:58:13 +0000152 <b>let</b> Namespace = "<em>Target</em>";
153}
154
Chris Lattner7a2fd892004-09-18 06:28:07 +0000155<b>class</b> IntReg&lt;<b>bits</b>&lt;5&gt; num, string name&gt; : <em>Target</em>Reg&lt;name&gt; {
Misha Brukman8eb67192004-09-06 22:58:13 +0000156 <b>field</b> <b>bits</b>&lt;5&gt; Num = num;
157}
158
Chris Lattner7a2fd892004-09-18 06:28:07 +0000159<b>def</b> R0 : IntReg&lt;0, "%R0"&gt;;
Misha Brukman8eb67192004-09-06 22:58:13 +0000160...
161
162// class RegisterClass is defined in Target.td
163<b>def</b> IReg : RegisterClass&lt;i64, 64, [R0, ... ]&gt;;
164</pre>
165</div>
166</li>
167
168<li><p><b>TableGen instruction info description</b> - break up instructions into
169classes, usually that's already done by the manufacturer (see instruction
170manual). Define a class for each instruction category. Define each opcode as a
171subclass of the category, with appropriate parameters such as the fixed binary
172encoding of opcodes and extended opcodes, and map the register bits to the bits
173of the instruction which they are encoded in (for the JIT). Also specify how
174the instruction should be printed so it can use the automatic assembly printer,
175e.g.:</p>
176
177<div class="doc_code">
178<pre>
179// class Instruction is defined in Target.td
180<b>class</b> Form&lt;<b>bits</b>&lt;6&gt; opcode, <b>dag</b> OL, <b>string</b> asmstr&gt; : Instruction {
181 <b>field</b> <b>bits</b>&lt;42&gt; Inst;
182
183 <b>let</b> Namespace = "<em>Target</em>";
184 <b>let</b> Inst{0-6} = opcode;
185 <b>let</b> OperandList = OL;
186 <b>let</b> AsmString = asmstr;
187}
188
189<b>def</b> ADD : Form&lt;42, (ops IReg:$rD, IReg:$rA, IReg:$rB), "add $rD, $rA, $rB"&gt;;
190</pre>
191</div>
192</li>
193
194</ul>
195
196</div>
197
198<!-- ======================================================================= -->
199<div class="doc_subsection">
200 <a name="lang">Language backends</a>
201</div>
202
203<div class="doc_text">
204
205<p>For now, just take a look at <tt>lib/Target/CBackend</tt> for an example of
206how the C backend is written.</p>
207
208</div>
209
210<!-- *********************************************************************** -->
211<div class="doc_section">
212 <a name="related">Related reading material</a>
213</div>
214<!-- *********************************************************************** -->
215
216<div class="doc_text">
217
218<ul>
219<li><a href="CodeGenerator.html">Code generator</a> -
220 describes some of the classes in code generation at a high level, but
221 it is not (yet) complete.</li>
222<li><a href="TableGenFundamentals.html">TableGen fundamentals</a> -
223 describes how to use TableGen to describe your target information succinctly
224</li>
225</ul>
226
227</div>
228
229<!-- *********************************************************************** -->
230
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