Tom Stellard | f98f2ce | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 1 | //===-- AMDGPU.h - MachineFunction passes hw codegen --------------*- C++ -*-=// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | /// \file |
| 9 | //===----------------------------------------------------------------------===// |
| 10 | |
| 11 | #ifndef AMDGPU_H |
| 12 | #define AMDGPU_H |
| 13 | |
| 14 | #include "AMDGPUTargetMachine.h" |
| 15 | #include "llvm/Support/TargetRegistry.h" |
| 16 | #include "llvm/Target/TargetMachine.h" |
| 17 | |
| 18 | namespace llvm { |
| 19 | |
| 20 | class FunctionPass; |
| 21 | class AMDGPUTargetMachine; |
| 22 | |
| 23 | // R600 Passes |
| 24 | FunctionPass* createR600KernelParametersPass(const DataLayout *TD); |
| 25 | FunctionPass *createR600ExpandSpecialInstrsPass(TargetMachine &tm); |
| 26 | |
| 27 | // SI Passes |
Tom Stellard | 6b7d99d | 2012-12-19 22:10:31 +0000 | [diff] [blame] | 28 | FunctionPass *createSIAnnotateControlFlowPass(); |
Tom Stellard | f98f2ce | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 29 | FunctionPass *createSIAssignInterpRegsPass(TargetMachine &tm); |
| 30 | FunctionPass *createSILowerControlFlowPass(TargetMachine &tm); |
| 31 | FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS); |
| 32 | FunctionPass *createSILowerLiteralConstantsPass(TargetMachine &tm); |
Tom Stellard | 82d3d45 | 2013-01-18 21:15:53 +0000 | [diff] [blame^] | 33 | FunctionPass *createSIInsertWaits(TargetMachine &tm); |
Tom Stellard | f98f2ce | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 34 | |
| 35 | // Passes common to R600 and SI |
Tom Stellard | 6b7d99d | 2012-12-19 22:10:31 +0000 | [diff] [blame] | 36 | Pass *createAMDGPUStructurizeCFGPass(); |
Tom Stellard | f98f2ce | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 37 | FunctionPass *createAMDGPUConvertToISAPass(TargetMachine &tm); |
| 38 | |
| 39 | } // End namespace llvm |
| 40 | |
| 41 | namespace ShaderType { |
| 42 | enum Type { |
| 43 | PIXEL = 0, |
| 44 | VERTEX = 1, |
| 45 | GEOMETRY = 2, |
| 46 | COMPUTE = 3 |
| 47 | }; |
| 48 | } |
| 49 | |
| 50 | #endif // AMDGPU_H |