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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 8b2b8a18354546d534b72f912153a3252ab4b857 / . / test / CodeGen / PowerPC / atomic-2.ll
blob: e56a7796671456142006d35e392928af902e4f95 [file] [log] [blame]
Eli Friedman3a594f42011-07-18 21:23:42 +0000[diff] [blame]1; RUN: llc < %s -march=ppc64 | FileCheck %s
Evan Cheng8608f2e2008-04-19 02:30:38 +0000[diff] [blame]2
Chris Lattnerb85e4eb2011-06-18 06:05:24 +0000[diff] [blame]3define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
Stephen Lin8b2b8a12013-07-14 06:24:09 +0000[diff] [blame^]4; CHECK-LABEL: exchange_and_add:
Eli Friedman3a594f42011-07-18 21:23:42 +0000[diff] [blame]5; CHECK: ldarx
Eli Friedmande412c32011-09-26 21:30:17 +0000[diff] [blame]6 %tmp = atomicrmw add i64* %mem, i64 %val monotonic
Eli Friedman3a594f42011-07-18 21:23:42 +0000[diff] [blame]7; CHECK: stdcx.
Chris Lattnerb85e4eb2011-06-18 06:05:24 +0000[diff] [blame]8 ret i64 %tmp
Evan Cheng8608f2e2008-04-19 02:30:38 +0000[diff] [blame]9}
10
Chris Lattnerb85e4eb2011-06-18 06:05:24 +0000[diff] [blame]11define i64 @exchange_and_cmp(i64* %mem) nounwind {
Stephen Lin8b2b8a12013-07-14 06:24:09 +0000[diff] [blame^]12; CHECK-LABEL: exchange_and_cmp:
Eli Friedman3a594f42011-07-18 21:23:42 +0000[diff] [blame]13; CHECK: ldarx
Eli Friedmande412c32011-09-26 21:30:17 +0000[diff] [blame]14 %tmp = cmpxchg i64* %mem, i64 0, i64 1 monotonic
Eli Friedman3a594f42011-07-18 21:23:42 +0000[diff] [blame]15; CHECK: stdcx.
16; CHECK: stdcx.
Chris Lattnerb85e4eb2011-06-18 06:05:24 +0000[diff] [blame]17 ret i64 %tmp
Evan Cheng8608f2e2008-04-19 02:30:38 +0000[diff] [blame]18}
19
Chris Lattnerb85e4eb2011-06-18 06:05:24 +0000[diff] [blame]20define i64 @exchange(i64* %mem, i64 %val) nounwind {
Stephen Lin8b2b8a12013-07-14 06:24:09 +0000[diff] [blame^]21; CHECK-LABEL: exchange:
Eli Friedman3a594f42011-07-18 21:23:42 +0000[diff] [blame]22; CHECK: ldarx
Eli Friedmande412c32011-09-26 21:30:17 +0000[diff] [blame]23 %tmp = atomicrmw xchg i64* %mem, i64 1 monotonic
Eli Friedman3a594f42011-07-18 21:23:42 +0000[diff] [blame]24; CHECK: stdcx.
Chris Lattnerb85e4eb2011-06-18 06:05:24 +0000[diff] [blame]25 ret i64 %tmp
Evan Cheng8608f2e2008-04-19 02:30:38 +0000[diff] [blame]26}
Hal Finkelcd9ea512012-12-25 17:22:53 +0000[diff] [blame]27
28define void @atomic_store(i64* %mem, i64 %val) nounwind {
29entry:
30; CHECK: @atomic_store
31 store atomic i64 %val, i64* %mem release, align 64
32; CHECK: ldarx
33; CHECK: stdcx.
34 ret void
35}
36
37define i64 @atomic_load(i64* %mem) nounwind {
38entry:
39; CHECK: @atomic_load
40 %tmp = load atomic i64* %mem acquire, align 64
41; CHECK: ldarx
42; CHECK: stdcx.
43; CHECK: stdcx.
44 ret i64 %tmp
45}
46