Chris Lattner | b36cbd0 | 2005-07-01 22:44:09 +0000 | [diff] [blame] | 1 | //===-- X86IntelAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly --===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the LLVM research group and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains a printer that converts from our internal representation |
| 11 | // of machine-dependent LLVM code to Intel format assembly language. |
| 12 | // This printer is the output mechanism used by `llc'. |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | #include "X86IntelAsmPrinter.h" |
| 17 | #include "X86.h" |
| 18 | #include "llvm/Module.h" |
| 19 | #include "llvm/Assembly/Writer.h" |
| 20 | #include "llvm/Support/Mangler.h" |
| 21 | using namespace llvm; |
| 22 | using namespace x86; |
| 23 | |
| 24 | /// runOnMachineFunction - This uses the printMachineInstruction() |
| 25 | /// method to print assembly for each instruction. |
| 26 | /// |
| 27 | bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) { |
Chris Lattner | 8b8b951 | 2005-11-21 07:51:23 +0000 | [diff] [blame^] | 28 | SetupMachineFunction(MF); |
Chris Lattner | b36cbd0 | 2005-07-01 22:44:09 +0000 | [diff] [blame] | 29 | O << "\n\n"; |
| 30 | |
| 31 | // Print out constants referenced by the function |
| 32 | printConstantPool(MF.getConstantPool()); |
| 33 | |
| 34 | // Print out labels for the function. |
Chris Lattner | 7b6e53c | 2005-11-21 07:16:34 +0000 | [diff] [blame] | 35 | SwitchSection("\t.text\n", MF.getFunction()); |
Chris Lattner | 8b8b951 | 2005-11-21 07:51:23 +0000 | [diff] [blame^] | 36 | EmitAlignment(4); |
Chris Lattner | b36cbd0 | 2005-07-01 22:44:09 +0000 | [diff] [blame] | 37 | O << "\t.globl\t" << CurrentFnName << "\n"; |
| 38 | if (!forCygwin && !forDarwin) |
| 39 | O << "\t.type\t" << CurrentFnName << ", @function\n"; |
| 40 | O << CurrentFnName << ":\n"; |
| 41 | |
| 42 | // Print out code for the function. |
| 43 | for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); |
| 44 | I != E; ++I) { |
| 45 | // Print a label for the basic block if there are any predecessors. |
| 46 | if (I->pred_begin() != I->pred_end()) |
Chris Lattner | 64965ba | 2005-11-21 07:43:59 +0000 | [diff] [blame] | 47 | O << PrivateGlobalPrefix << "BB" << CurrentFnName << "_" << I->getNumber() |
| 48 | << ":\t" |
Chris Lattner | b36cbd0 | 2005-07-01 22:44:09 +0000 | [diff] [blame] | 49 | << CommentString << " " << I->getBasicBlock()->getName() << "\n"; |
| 50 | for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); |
| 51 | II != E; ++II) { |
| 52 | // Print the assembly for the instruction. |
| 53 | O << "\t"; |
| 54 | printMachineInstruction(II); |
| 55 | } |
| 56 | } |
| 57 | |
| 58 | // We didn't modify anything. |
| 59 | return false; |
| 60 | } |
| 61 | |
Nate Begeman | 6c7cb29 | 2005-07-14 22:52:25 +0000 | [diff] [blame] | 62 | void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op, |
| 63 | MVT::ValueType VT) { |
| 64 | unsigned char value = MI->getOperand(Op).getImmedValue(); |
| 65 | assert(value <= 7 && "Invalid ssecc argument!"); |
| 66 | switch (value) { |
| 67 | case 0: O << "eq"; break; |
| 68 | case 1: O << "lt"; break; |
| 69 | case 2: O << "le"; break; |
| 70 | case 3: O << "unord"; break; |
| 71 | case 4: O << "neq"; break; |
| 72 | case 5: O << "nlt"; break; |
| 73 | case 6: O << "nle"; break; |
| 74 | case 7: O << "ord"; break; |
| 75 | } |
| 76 | } |
| 77 | |
Chris Lattner | b36cbd0 | 2005-07-01 22:44:09 +0000 | [diff] [blame] | 78 | void X86IntelAsmPrinter::printOp(const MachineOperand &MO, |
| 79 | bool elideOffsetKeyword /* = false */) { |
| 80 | const MRegisterInfo &RI = *TM.getRegisterInfo(); |
| 81 | switch (MO.getType()) { |
| 82 | case MachineOperand::MO_VirtualRegister: |
| 83 | if (Value *V = MO.getVRegValueOrNull()) { |
| 84 | O << "<" << V->getName() << ">"; |
| 85 | return; |
| 86 | } |
| 87 | // FALLTHROUGH |
| 88 | case MachineOperand::MO_MachineRegister: |
| 89 | if (MRegisterInfo::isPhysicalRegister(MO.getReg())) |
| 90 | // Bug Workaround: See note in Printer::doInitialization about %. |
| 91 | O << "%" << RI.get(MO.getReg()).Name; |
| 92 | else |
| 93 | O << "%reg" << MO.getReg(); |
| 94 | return; |
| 95 | |
| 96 | case MachineOperand::MO_SignExtendedImmed: |
| 97 | case MachineOperand::MO_UnextendedImmed: |
| 98 | O << (int)MO.getImmedValue(); |
| 99 | return; |
| 100 | case MachineOperand::MO_MachineBasicBlock: { |
| 101 | MachineBasicBlock *MBBOp = MO.getMachineBasicBlock(); |
Chris Lattner | 64965ba | 2005-11-21 07:43:59 +0000 | [diff] [blame] | 102 | O << PrivateGlobalPrefix << "BB" |
| 103 | << Mang->getValueName(MBBOp->getParent()->getFunction()) |
Chris Lattner | b36cbd0 | 2005-07-01 22:44:09 +0000 | [diff] [blame] | 104 | << "_" << MBBOp->getNumber () << "\t# " |
| 105 | << MBBOp->getBasicBlock ()->getName (); |
| 106 | return; |
| 107 | } |
| 108 | case MachineOperand::MO_PCRelativeDisp: |
| 109 | std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs"; |
| 110 | abort (); |
| 111 | return; |
| 112 | case MachineOperand::MO_GlobalAddress: { |
| 113 | if (!elideOffsetKeyword) |
| 114 | O << "OFFSET "; |
| 115 | O << Mang->getValueName(MO.getGlobal()); |
| 116 | int Offset = MO.getOffset(); |
| 117 | if (Offset > 0) |
| 118 | O << " + " << Offset; |
| 119 | else if (Offset < 0) |
| 120 | O << " - " << -Offset; |
| 121 | return; |
| 122 | } |
| 123 | case MachineOperand::MO_ExternalSymbol: |
| 124 | O << GlobalPrefix << MO.getSymbolName(); |
| 125 | return; |
| 126 | default: |
| 127 | O << "<unknown operand type>"; return; |
| 128 | } |
| 129 | } |
| 130 | |
| 131 | void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){ |
| 132 | assert(isMem(MI, Op) && "Invalid memory reference!"); |
| 133 | |
| 134 | const MachineOperand &BaseReg = MI->getOperand(Op); |
| 135 | int ScaleVal = MI->getOperand(Op+1).getImmedValue(); |
| 136 | const MachineOperand &IndexReg = MI->getOperand(Op+2); |
| 137 | const MachineOperand &DispSpec = MI->getOperand(Op+3); |
| 138 | |
| 139 | if (BaseReg.isFrameIndex()) { |
| 140 | O << "[frame slot #" << BaseReg.getFrameIndex(); |
| 141 | if (DispSpec.getImmedValue()) |
| 142 | O << " + " << DispSpec.getImmedValue(); |
| 143 | O << "]"; |
| 144 | return; |
| 145 | } else if (BaseReg.isConstantPoolIndex()) { |
Chris Lattner | c41cc83 | 2005-11-21 06:46:22 +0000 | [diff] [blame] | 146 | O << "[" << PrivateGlobalPrefix << "CPI" << CurrentFnName << "_" |
Chris Lattner | b36cbd0 | 2005-07-01 22:44:09 +0000 | [diff] [blame] | 147 | << BaseReg.getConstantPoolIndex(); |
| 148 | |
| 149 | if (IndexReg.getReg()) { |
| 150 | O << " + "; |
| 151 | if (ScaleVal != 1) |
| 152 | O << ScaleVal << "*"; |
| 153 | printOp(IndexReg); |
| 154 | } |
| 155 | |
| 156 | if (DispSpec.getImmedValue()) |
| 157 | O << " + " << DispSpec.getImmedValue(); |
| 158 | O << "]"; |
| 159 | return; |
| 160 | } |
| 161 | |
| 162 | O << "["; |
| 163 | bool NeedPlus = false; |
| 164 | if (BaseReg.getReg()) { |
| 165 | printOp(BaseReg, true); |
| 166 | NeedPlus = true; |
| 167 | } |
| 168 | |
| 169 | if (IndexReg.getReg()) { |
| 170 | if (NeedPlus) O << " + "; |
| 171 | if (ScaleVal != 1) |
| 172 | O << ScaleVal << "*"; |
| 173 | printOp(IndexReg); |
| 174 | NeedPlus = true; |
| 175 | } |
| 176 | |
| 177 | if (DispSpec.isGlobalAddress()) { |
| 178 | if (NeedPlus) |
| 179 | O << " + "; |
| 180 | printOp(DispSpec, true); |
| 181 | } else { |
| 182 | int DispVal = DispSpec.getImmedValue(); |
| 183 | if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) { |
| 184 | if (NeedPlus) |
| 185 | if (DispVal > 0) |
| 186 | O << " + "; |
| 187 | else { |
| 188 | O << " - "; |
| 189 | DispVal = -DispVal; |
| 190 | } |
| 191 | O << DispVal; |
| 192 | } |
| 193 | } |
| 194 | O << "]"; |
| 195 | } |
| 196 | |
| 197 | |
| 198 | /// printMachineInstruction -- Print out a single X86 LLVM instruction |
| 199 | /// MI in Intel syntax to the current output stream. |
| 200 | /// |
| 201 | void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) { |
| 202 | ++EmittedInsts; |
| 203 | |
| 204 | // Call the autogenerated instruction printer routines. |
| 205 | printInstruction(MI); |
| 206 | } |
| 207 | |
| 208 | bool X86IntelAsmPrinter::doInitialization(Module &M) { |
Chris Lattner | 6a709a4 | 2005-07-03 17:34:39 +0000 | [diff] [blame] | 209 | X86SharedAsmPrinter::doInitialization(M); |
Chris Lattner | b36cbd0 | 2005-07-01 22:44:09 +0000 | [diff] [blame] | 210 | // Tell gas we are outputting Intel syntax (not AT&T syntax) assembly. |
| 211 | // |
| 212 | // Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an |
| 213 | // instruction as a reference to the register named sp, and if you try to |
| 214 | // reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased |
| 215 | // before being looked up in the symbol table. This creates spurious |
| 216 | // `undefined symbol' errors when linking. Workaround: Do not use `noprefix' |
| 217 | // mode, and decorate all register names with percent signs. |
| 218 | O << "\t.intel_syntax\n"; |
| 219 | return false; |
| 220 | } |
| 221 | |
| 222 | // Include the auto-generated portion of the assembly writer. |
| 223 | #include "X86GenAsmWriter1.inc" |