| Dan Gohman | 8e0163a | 2010-06-24 02:06:24 +0000 | [diff] [blame^] | 1 | ; RUN: llc -march=x86-64 -asm-verbose=false < %s | FileCheck %s |
| 2 | |
| 3 | ; This switch should use bit tests, and the third bit test case is just |
| 4 | ; testing for one possible value, so it doesn't need a bt. |
| 5 | |
| 6 | ; CHECK: movabsq $2305843009482129440, %r |
| 7 | ; CHECK-NEXT: btq %rax, %r |
| 8 | ; CHECK-NEXT: jb |
| 9 | ; CHECK-NEXT: movl $671088640, %e |
| 10 | ; CHECK-NEXT: btq %rax, %r |
| 11 | ; CHECK-NEXT: jb |
| 12 | ; CHECK-NEXT: testq %rax, %r |
| 13 | ; CHECK-NEXT: j |
| 14 | |
| 15 | define void @test(i8* %l) nounwind { |
| 16 | entry: |
| 17 | %l.addr = alloca i8*, align 8 ; <i8**> [#uses=2] |
| 18 | store i8* %l, i8** %l.addr |
| 19 | %tmp = load i8** %l.addr ; <i8*> [#uses=1] |
| 20 | %tmp1 = load i8* %tmp ; <i8> [#uses=1] |
| 21 | %conv = sext i8 %tmp1 to i32 ; <i32> [#uses=1] |
| 22 | switch i32 %conv, label %sw.default [ |
| 23 | i32 62, label %sw.bb |
| 24 | i32 60, label %sw.bb |
| 25 | i32 38, label %sw.bb2 |
| 26 | i32 94, label %sw.bb2 |
| 27 | i32 61, label %sw.bb2 |
| 28 | i32 33, label %sw.bb4 |
| 29 | ] |
| 30 | |
| 31 | sw.bb: ; preds = %entry, %entry |
| 32 | call void @foo(i32 0) |
| 33 | br label %sw.epilog |
| 34 | |
| 35 | sw.bb2: ; preds = %entry, %entry, %entry |
| 36 | call void @foo(i32 1) |
| 37 | br label %sw.epilog |
| 38 | |
| 39 | sw.bb4: ; preds = %entry |
| 40 | call void @foo(i32 3) |
| 41 | br label %sw.epilog |
| 42 | |
| 43 | sw.default: ; preds = %entry |
| 44 | call void @foo(i32 97) |
| 45 | br label %sw.epilog |
| 46 | |
| 47 | sw.epilog: ; preds = %sw.default, %sw.bb4, %sw.bb2, %sw.bb |
| 48 | ret void |
| 49 | } |
| 50 | |
| 51 | declare void @foo(i32) |