blob: 511c7b5ebcb69639002855cf01fc4c12f218e0df [file] [log] [blame]
Jakob Stoklund Olesen8f1282d2011-06-04 23:34:40 +00001; RUN: llc < %s -march=x86 -regalloc=linearscan | FileCheck %s
2; RUN: llc < %s -march=x86 -regalloc=fast | FileCheck %s
3; RUN: llc < %s -march=x86 -regalloc=basic | FileCheck %s
4; RUN: llc < %s -march=x86 -regalloc=greedy | FileCheck %s
Jakob Stoklund Olesen85f4fda2010-05-12 00:11:24 +00005
Jakob Stoklund Olesen8f1282d2011-06-04 23:34:40 +00006; The 1st, 2nd, 3rd and 5th registers must all be different. The registers
Dale Johannesen8e3455b2008-09-24 23:13:09 +00007; referenced in the 4th and 6th operands must not be the same as the 1st or 5th
Jakob Stoklund Olesen8f1282d2011-06-04 23:34:40 +00008; operand.
9;
10; CHECK: 1st=[[A1:%...]]
11; CHECK-NOT: [[A1]]
12; CHECK: 2nd=[[A2:%...]]
13; CHECK-NOT: [[A1]]
14; CHECK-NOT: [[A2]]
15; CHECK: 3rd=[[A3:%...]]
16; CHECK-NOT: [[A1]]
17; CHECK-NOT: [[A2]]
18; CHECK-NOT: [[A3]]
19; CHECK: 5th=[[A5:%...]]
20; CHECK-NOT: [[A1]]
Benjamin Kramer8f00ffc2011-08-31 00:02:59 +000021; CHECK-NOT: [[A5]]
Jakob Stoklund Olesen8f1282d2011-06-04 23:34:40 +000022; CHECK: =4th
23
24; The 6th operand is an 8-bit register, and it mustn't alias the 1st and 5th.
25; CHECK: 1%e[[S1:.]]x
26; CHECK: 5%e[[S5:.]]x
27; CHECK-NOT: %[[S1]]
28; CHECK-NOT: %[[S5]]
29
Dale Johannesen8e3455b2008-09-24 23:13:09 +000030target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
31target triple = "i386-apple-darwin8"
32 %struct.foo = type { i32, i32, i8* }
33
34define i32 @get(%struct.foo* %c, i8* %state) nounwind {
35entry:
36 %0 = getelementptr %struct.foo* %c, i32 0, i32 0 ; <i32*> [#uses=2]
37 %1 = getelementptr %struct.foo* %c, i32 0, i32 1 ; <i32*> [#uses=2]
38 %2 = getelementptr %struct.foo* %c, i32 0, i32 2 ; <i8**> [#uses=2]
39 %3 = load i32* %0, align 4 ; <i32> [#uses=1]
40 %4 = load i32* %1, align 4 ; <i32> [#uses=1]
41 %5 = load i8* %state, align 1 ; <i8> [#uses=1]
Jakob Stoklund Olesen8f1282d2011-06-04 23:34:40 +000042 %asmtmp = tail call { i32, i32, i32, i32 } asm sideeffect "#1st=$0 $1 2nd=$1 $2 3rd=$2 $4 5th=$4 $3=4th 1$0 1%eXx 5$4 5%eXx 6th=$5", "=&r,=r,=r,=*m,=&q,=*imr,1,2,*m,5,~{dirflag},~{fpsr},~{flags},~{cx}"(i8** %2, i8* %state, i32 %3, i32 %4, i8** %2, i8 %5) nounwind ; <{ i32, i32, i32, i32 }> [#uses=3]
Dale Johannesen8e3455b2008-09-24 23:13:09 +000043 %asmresult = extractvalue { i32, i32, i32, i32 } %asmtmp, 0 ; <i32> [#uses=1]
44 %asmresult1 = extractvalue { i32, i32, i32, i32 } %asmtmp, 1 ; <i32> [#uses=1]
45 store i32 %asmresult1, i32* %0
46 %asmresult2 = extractvalue { i32, i32, i32, i32 } %asmtmp, 2 ; <i32> [#uses=1]
47 store i32 %asmresult2, i32* %1
48 ret i32 %asmresult
49}