blob: 18d68f79370cef7e00b651bc5845ae9e6e191b82 [file] [log] [blame]
Dan Gohmanda594cf2009-09-09 00:09:15 +00001; RUN: llc < %s -march=arm
Jakob Stoklund Olesenf94139e2009-08-15 18:16:58 +00002; PR4528
3
4; Inline asm is allowed to contain operands "=&r", "0".
5
6%struct.device_dma_parameters = type { i32, i32 }
7%struct.iovec = type { i8*, i32 }
8
9define arm_aapcscc i32 @generic_segment_checks(%struct.iovec* nocapture %iov, i32* nocapture %nr_segs, i32* nocapture %count, i32 %access_flags) nounwind optsize {
10entry:
11 br label %bb8
12
13bb: ; preds = %bb8
14 br i1 undef, label %bb10, label %bb2
15
16bb2: ; preds = %bb
17 %asmtmp = tail call %struct.device_dma_parameters asm "adds $1, $2, $3; sbcccs $1, $1, $0; movcc $0, #0", "=&r,=&r,r,Ir,0,~{cc}"(i8* undef, i32 undef, i32 0) nounwind; <%struct.device_dma_parameters> [#uses=1]
18 %asmresult = extractvalue %struct.device_dma_parameters %asmtmp, 0; <i32> [#uses=1]
19 %0 = icmp eq i32 %asmresult, 0 ; <i1> [#uses=1]
20 br i1 %0, label %bb7, label %bb4
21
22bb4: ; preds = %bb2
23 br i1 undef, label %bb10, label %bb9
24
25bb7: ; preds = %bb2
26 %1 = add i32 %2, 1 ; <i32> [#uses=1]
27 br label %bb8
28
29bb8: ; preds = %bb7, %entry
30 %2 = phi i32 [ 0, %entry ], [ %1, %bb7 ] ; <i32> [#uses=3]
31 %scevgep22 = getelementptr %struct.iovec* %iov, i32 %2, i32 0; <i8**> [#uses=0]
32 %3 = load i32* %nr_segs, align 4 ; <i32> [#uses=1]
33 %4 = icmp ult i32 %2, %3 ; <i1> [#uses=1]
34 br i1 %4, label %bb, label %bb9
35
36bb9: ; preds = %bb8, %bb4
37 store i32 undef, i32* %count, align 4
38 ret i32 0
39
40bb10: ; preds = %bb4, %bb
41 ret i32 0
42}