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5 <title>Writing an LLVM backend</title>
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10
11<div class="doc_title">
12 Writing an LLVM backend
13</div>
14
15<ol>
16 <li><a href="#intro">Introduction</a>
17 <li><a href="#backends">Writing a backend</a>
18 <ol>
Chris Lattner7a2fd892004-09-18 06:28:07 +000019 <li><a href="#machine">Machine backends</a>
Misha Brukman8eb67192004-09-06 22:58:13 +000020 <ol>
21 <li><a href="#machineTOC">Outline</a></li>
22 <li><a href="#machineDetails">Implementation details</a></li>
23 </ol></li>
Misha Brukman8eb67192004-09-06 22:58:13 +000024 <li><a href="#lang">Language backends</a></li>
25 </ol></li>
26 <li><a href="#related">Related reading material</a>
27</ol>
28
29<div class="doc_author">
30 <p>Written by <a href="http://misha.brukman.net">Misha Brukman</a></p>
31</div>
32
33<!-- *********************************************************************** -->
34<div class="doc_section">
35 <a name="intro">Introduction</a>
36</div>
37<!-- *********************************************************************** -->
38
39<div class="doc_text">
40
41<p>This document describes techniques for writing backends for LLVM which
42convert the LLVM representation to machine assembly code or other languages.</p>
43
44</div>
45
46<!-- *********************************************************************** -->
47<div class="doc_section">
48 <a name="backends">Writing a backend</a>
49</div>
50<!-- *********************************************************************** -->
51
52<!-- ======================================================================= -->
53<div class="doc_subsection">
54 <a name="machine">Machine backends</a>
55</div>
56
57<!-- _______________________________________________________________________ -->
58<div class="doc_subsubsection">
59 <a name="machineTOC">Outline</a>
60</div>
61
62<div class="doc_text">
63
64<p>In general, you want to follow the format of X86 or PowerPC (in
65<tt>lib/Target</tt>).</p>
66
67<p>To create a static compiler (one that emits text assembly), you need to
68implement the following:</p>
69
70<ul>
71<li>Describe the register set
72 <ul>
73 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
74 the register set and register classes</li>
75 <li>Implement a subclass of <tt><a
76 href="CodeGenerator.html#mregisterinfo">MRegisterInfo</a></tt></li>
77 </ul></li>
78<li>Describe the instruction set
79 <ul>
80 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
81 the instruction set</li>
82 <li>Implement a subclass of <tt><a
83 href="CodeGenerator.html#targetinstrinfo">TargetInstrInfo</a></tt></li>
84 </ul></li>
85<li>Describe the target machine
86 <ul>
87 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
88 the target that describes the pointer size and references the instruction
89 set</li>
90 <li>Implement a subclass of <tt><a
91 href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>, which
92 configures <tt><a href="CodeGenerator.html#targetdata">TargetData</a></tt>
93 correctly</li>
94 </ul></li>
95<li>Implement the assembly printer for the architecture. Usually, if you have
96described the instruction set with the assembly printer generator in mind, that
97step can be almost automated.</li>
98</ul>
99
100<p>Now, for static code generation you also need to write an instruction
101selector for your platform: see <tt>lib/Target/*/*ISelSimple.cpp</tt> which
102is no longer "simple" but it gives you the idea: you have to be able to create
103MachineInstrs for any given LLVM instruction using the <tt>InstVisitor</tt>
104pattern, and produce a <tt>MachineFunction</tt> with
105<tt>MachineBasicBlock</tt>s full of <tt><a
106href="CodeGenerator.html#machineinstr">MachineInstr</a></tt>s for a
107corresponding LLVM Function. Creating an instruction selector is perhaps the
108most time-consuming part of creating a back-end.</p>
109
110<p>To create a JIT for your platform:</p>
111
112<ul>
113<li>Create a subclass of <tt><a
114 href="CodeGenerator.html#targetjitinfo">TargetJITInfo</a></tt></li>
115<li>Create a machine code emitter that will be used to emit binary code
116 directly into memory, given <tt>MachineInstr</tt>s</li>
117</ul>
118
119<p>Note that <tt>lib/target/Skeleton</tt> is a clean skeleton for a new target,
120so you might want to start with that and adapt it for your target, and if you
121are wondering how things are done, peek in the X86 or PowerPC target.</p>
122
123<p>The Skeleton target is non-functional but provides the basic building blocks
124you will need for your endeavor.</p>
125
126</div>
127
128<!-- _______________________________________________________________________ -->
129<div class="doc_subsubsection">
130 <a name="machineDetails">Implementation details</a>
131</div>
132
133<div class="doc_text">
134
135<ul>
136
137<li><p><b>TableGen register info description</b> - describe a class which
138will store the register's number in the binary encoding of the instruction
139(e.g., for JIT purposes).</p>
140
141<p>You also need to define register classes to contain these registers, such as
142the integer register class and floating-point register class, so that you can
143allocate virtual registers to instructions from these sets, and let the
144target-independent register allocator automatically choose the actual
145architected registers.</p>
146
147<div class="doc_code">
148<pre>
149// class Register is defined in Target.td
Chris Lattner7a2fd892004-09-18 06:28:07 +0000150<b>class</b> <em>Target</em>Reg&lt;string name&gt; : Register&lt;name&gt; {
Misha Brukman8eb67192004-09-06 22:58:13 +0000151 <b>let</b> Namespace = "<em>Target</em>";
152}
153
Chris Lattner7a2fd892004-09-18 06:28:07 +0000154<b>class</b> IntReg&lt;<b>bits</b>&lt;5&gt; num, string name&gt; : <em>Target</em>Reg&lt;name&gt; {
Misha Brukman8eb67192004-09-06 22:58:13 +0000155 <b>field</b> <b>bits</b>&lt;5&gt; Num = num;
156}
157
Chris Lattner7a2fd892004-09-18 06:28:07 +0000158<b>def</b> R0 : IntReg&lt;0, "%R0"&gt;;
Misha Brukman8eb67192004-09-06 22:58:13 +0000159...
160
161// class RegisterClass is defined in Target.td
162<b>def</b> IReg : RegisterClass&lt;i64, 64, [R0, ... ]&gt;;
163</pre>
164</div>
165</li>
166
167<li><p><b>TableGen instruction info description</b> - break up instructions into
168classes, usually that's already done by the manufacturer (see instruction
169manual). Define a class for each instruction category. Define each opcode as a
170subclass of the category, with appropriate parameters such as the fixed binary
171encoding of opcodes and extended opcodes, and map the register bits to the bits
172of the instruction which they are encoded in (for the JIT). Also specify how
173the instruction should be printed so it can use the automatic assembly printer,
174e.g.:</p>
175
176<div class="doc_code">
177<pre>
178// class Instruction is defined in Target.td
179<b>class</b> Form&lt;<b>bits</b>&lt;6&gt; opcode, <b>dag</b> OL, <b>string</b> asmstr&gt; : Instruction {
180 <b>field</b> <b>bits</b>&lt;42&gt; Inst;
181
182 <b>let</b> Namespace = "<em>Target</em>";
183 <b>let</b> Inst{0-6} = opcode;
184 <b>let</b> OperandList = OL;
185 <b>let</b> AsmString = asmstr;
186}
187
188<b>def</b> ADD : Form&lt;42, (ops IReg:$rD, IReg:$rA, IReg:$rB), "add $rD, $rA, $rB"&gt;;
189</pre>
190</div>
191</li>
192
193</ul>
194
195</div>
196
197<!-- ======================================================================= -->
198<div class="doc_subsection">
199 <a name="lang">Language backends</a>
200</div>
201
202<div class="doc_text">
203
204<p>For now, just take a look at <tt>lib/Target/CBackend</tt> for an example of
205how the C backend is written.</p>
206
207</div>
208
209<!-- *********************************************************************** -->
210<div class="doc_section">
211 <a name="related">Related reading material</a>
212</div>
213<!-- *********************************************************************** -->
214
215<div class="doc_text">
216
217<ul>
218<li><a href="CodeGenerator.html">Code generator</a> -
219 describes some of the classes in code generation at a high level, but
220 it is not (yet) complete.</li>
221<li><a href="TableGenFundamentals.html">TableGen fundamentals</a> -
222 describes how to use TableGen to describe your target information succinctly
223</li>
224</ul>
225
226</div>
227
228<!-- *********************************************************************** -->
229
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