blob: eb7cf2c6467c82345a688ba47d1c092c0cbe966d [file] [log] [blame]
Kalle Raiskila951b2292010-06-21 15:08:16 +00001; RUN: llc < %s -march=cellspu -regalloc=linearscan > %t1.s
Chris Lattner994d6cf2008-01-18 19:53:43 +00002; RUN: grep brsl %t1.s | count 1
Scott Michel0a92af42007-12-19 20:50:49 +00003; RUN: grep brasl %t1.s | count 1
Scott Micheldb1b5bf2008-12-09 06:12:03 +00004; RUN: grep stqd %t1.s | count 80
Kalle Raiskila951b2292010-06-21 15:08:16 +00005; RUN: llc < %s -march=cellspu | FileCheck %s
Scott Michel0a92af42007-12-19 20:50:49 +00006
7target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
8target triple = "spu"
9
10define i32 @main() {
11entry:
12 %a = call i32 @stub_1(i32 1, float 0x400921FA00000000)
13 call void @extern_stub_1(i32 %a, i32 4)
14 ret i32 %a
15}
16
17declare void @extern_stub_1(i32, i32)
18
19define i32 @stub_1(i32 %x, float %y) {
Kalle Raiskila951b2292010-06-21 15:08:16 +000020 ; CHECK: il $3, 0
21 ; CHECK: bi $lr
Scott Michel0a92af42007-12-19 20:50:49 +000022entry:
23 ret i32 0
24}
Scott Micheld976c212008-10-30 01:51:48 +000025
26; vararg call: ensure that all caller-saved registers are spilled to the
27; stack:
28define i32 @stub_2(...) {
29entry:
30 ret i32 0
31}