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Lang Hamese2b201b2009-05-18 19:03:16 +00001//===-- llvm/CodeGen/Spiller.cpp - Spiller -------------------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#define DEBUG_TYPE "spiller"
11
12#include "Spiller.h"
13#include "VirtRegMap.h"
14#include "llvm/CodeGen/LiveIntervalAnalysis.h"
Lang Hamesf41538d2009-06-02 16:53:25 +000015#include "llvm/CodeGen/LiveStackAnalysis.h"
Lang Hamese2b201b2009-05-18 19:03:16 +000016#include "llvm/CodeGen/MachineFunction.h"
17#include "llvm/CodeGen/MachineRegisterInfo.h"
18#include "llvm/CodeGen/MachineFrameInfo.h"
19#include "llvm/Target/TargetMachine.h"
20#include "llvm/Target/TargetInstrInfo.h"
21#include "llvm/Support/Debug.h"
22
Lang Hamese2b201b2009-05-18 19:03:16 +000023using namespace llvm;
24
25Spiller::~Spiller() {}
26
27namespace {
28
Lang Hamesf41538d2009-06-02 16:53:25 +000029/// Utility class for spillers.
30class SpillerBase : public Spiller {
31protected:
32
33 MachineFunction *mf;
34 LiveIntervals *lis;
35 LiveStacks *ls;
36 MachineFrameInfo *mfi;
37 MachineRegisterInfo *mri;
38 const TargetInstrInfo *tii;
39 VirtRegMap *vrm;
40
41 /// Construct a spiller base.
42 SpillerBase(MachineFunction *mf, LiveIntervals *lis, LiveStacks *ls, VirtRegMap *vrm) :
43 mf(mf), lis(lis), ls(ls), vrm(vrm)
Lang Hamese2b201b2009-05-18 19:03:16 +000044 {
45 mfi = mf->getFrameInfo();
46 mri = &mf->getRegInfo();
47 tii = mf->getTarget().getInstrInfo();
48 }
49
Lang Hames857c4e02009-06-17 21:01:20 +000050 /// Ensures there is space before the given machine instruction, returns the
51 /// instruction's new number.
52 unsigned makeSpaceBefore(MachineInstr *mi) {
53 if (!lis->hasGapBeforeInstr(lis->getInstructionIndex(mi))) {
54 lis->scaleNumbering(2);
55 ls->scaleNumbering(2);
56 }
Lang Hamese2b201b2009-05-18 19:03:16 +000057
Lang Hames857c4e02009-06-17 21:01:20 +000058 unsigned miIdx = lis->getInstructionIndex(mi);
59
60 assert(lis->hasGapBeforeInstr(miIdx));
61
62 return miIdx;
63 }
64
65 /// Ensure there is space after the given machine instruction, returns the
66 /// instruction's new number.
67 unsigned makeSpaceAfter(MachineInstr *mi) {
Lang Hamesf41538d2009-06-02 16:53:25 +000068 if (!lis->hasGapAfterInstr(lis->getInstructionIndex(mi))) {
69 lis->scaleNumbering(2);
70 ls->scaleNumbering(2);
71 }
72
73 unsigned miIdx = lis->getInstructionIndex(mi);
74
75 assert(lis->hasGapAfterInstr(miIdx));
76
Lang Hames857c4e02009-06-17 21:01:20 +000077 return miIdx;
78 }
79
80
81 /// Insert a store of the given vreg to the given stack slot immediately
82 /// after the given instruction. Returns the base index of the inserted
83 /// instruction. The caller is responsible for adding an appropriate
84 /// LiveInterval to the LiveIntervals analysis.
85 unsigned insertStoreFor(MachineInstr *mi, unsigned ss,
86 unsigned vreg,
87 const TargetRegisterClass *trc) {
88 MachineBasicBlock::iterator nextInstItr(mi);
89 ++nextInstItr;
90
91 unsigned miIdx = makeSpaceAfter(mi);
92
93 tii->storeRegToStackSlot(*mi->getParent(), nextInstItr, vreg,
Lang Hamesf41538d2009-06-02 16:53:25 +000094 true, ss, trc);
95 MachineBasicBlock::iterator storeInstItr(mi);
96 ++storeInstItr;
97 MachineInstr *storeInst = &*storeInstItr;
98 unsigned storeInstIdx = miIdx + LiveInterval::InstrSlots::NUM;
99
100 assert(lis->getInstructionFromIndex(storeInstIdx) == 0 &&
101 "Store inst index already in use.");
102
103 lis->InsertMachineInstrInMaps(storeInst, storeInstIdx);
104
105 return storeInstIdx;
106 }
107
108 /// Insert a load of the given veg from the given stack slot immediately
109 /// before the given instruction. Returns the base index of the inserted
110 /// instruction. The caller is responsible for adding an appropriate
111 /// LiveInterval to the LiveIntervals analysis.
112 unsigned insertLoadFor(MachineInstr *mi, unsigned ss,
Lang Hames857c4e02009-06-17 21:01:20 +0000113 unsigned vreg,
Lang Hamesf41538d2009-06-02 16:53:25 +0000114 const TargetRegisterClass *trc) {
115 MachineBasicBlock::iterator useInstItr(mi);
Lang Hames857c4e02009-06-17 21:01:20 +0000116
117 unsigned miIdx = makeSpaceBefore(mi);
118
119 tii->loadRegFromStackSlot(*mi->getParent(), useInstItr, vreg, ss, trc);
Lang Hamesf41538d2009-06-02 16:53:25 +0000120 MachineBasicBlock::iterator loadInstItr(mi);
121 --loadInstItr;
122 MachineInstr *loadInst = &*loadInstItr;
123 unsigned loadInstIdx = miIdx - LiveInterval::InstrSlots::NUM;
124
125 assert(lis->getInstructionFromIndex(loadInstIdx) == 0 &&
126 "Load inst index already in use.");
127
128 lis->InsertMachineInstrInMaps(loadInst, loadInstIdx);
129
130 return loadInstIdx;
131 }
132
Lang Hamesf41538d2009-06-02 16:53:25 +0000133 /// Add spill ranges for every use/def of the live interval, inserting loads
134 /// immediately before each use, and stores after each def. No folding is
135 /// attempted.
136 std::vector<LiveInterval*> trivialSpillEverywhere(LiveInterval *li) {
137 DOUT << "Spilling everywhere " << *li << "\n";
Lang Hamese2b201b2009-05-18 19:03:16 +0000138
139 assert(li->weight != HUGE_VALF &&
140 "Attempting to spill already spilled value.");
141
142 assert(!li->isStackSlot() &&
143 "Trying to spill a stack slot.");
144
145 std::vector<LiveInterval*> added;
146
147 const TargetRegisterClass *trc = mri->getRegClass(li->reg);
Lang Hamese2b201b2009-05-18 19:03:16 +0000148 unsigned ss = vrm->assignVirt2StackSlot(li->reg);
149
Lang Hamesf41538d2009-06-02 16:53:25 +0000150 for (MachineRegisterInfo::reg_iterator
151 regItr = mri->reg_begin(li->reg); regItr != mri->reg_end();) {
Lang Hamese2b201b2009-05-18 19:03:16 +0000152
153 MachineInstr *mi = &*regItr;
Lang Hamesf41538d2009-06-02 16:53:25 +0000154 do {
155 ++regItr;
156 } while (regItr != mri->reg_end() && (&*regItr == mi));
157
Lang Hamese2b201b2009-05-18 19:03:16 +0000158 SmallVector<unsigned, 2> indices;
159 bool hasUse = false;
160 bool hasDef = false;
161
162 for (unsigned i = 0; i != mi->getNumOperands(); ++i) {
163 MachineOperand &op = mi->getOperand(i);
164
165 if (!op.isReg() || op.getReg() != li->reg)
166 continue;
167
168 hasUse |= mi->getOperand(i).isUse();
169 hasDef |= mi->getOperand(i).isDef();
170
171 indices.push_back(i);
172 }
173
174 unsigned newVReg = mri->createVirtualRegister(trc);
Lang Hamese2b201b2009-05-18 19:03:16 +0000175 vrm->grow();
176 vrm->assignVirt2StackSlot(newVReg, ss);
177
Lang Hamesf41538d2009-06-02 16:53:25 +0000178 LiveInterval *newLI = &lis->getOrCreateInterval(newVReg);
179 newLI->weight = HUGE_VALF;
180
Lang Hamese2b201b2009-05-18 19:03:16 +0000181 for (unsigned i = 0; i < indices.size(); ++i) {
182 mi->getOperand(indices[i]).setReg(newVReg);
183
184 if (mi->getOperand(indices[i]).isUse()) {
185 mi->getOperand(indices[i]).setIsKill(true);
186 }
187 }
188
Lang Hamesf41538d2009-06-02 16:53:25 +0000189 assert(hasUse || hasDef);
190
Lang Hamese2b201b2009-05-18 19:03:16 +0000191 if (hasUse) {
192 unsigned loadInstIdx = insertLoadFor(mi, ss, newVReg, trc);
193 unsigned start = lis->getDefIndex(loadInstIdx),
194 end = lis->getUseIndex(lis->getInstructionIndex(mi));
195
196 VNInfo *vni =
Lang Hames857c4e02009-06-17 21:01:20 +0000197 newLI->getNextValue(loadInstIdx, 0, true, lis->getVNInfoAllocator());
Lang Hamese2b201b2009-05-18 19:03:16 +0000198 vni->kills.push_back(lis->getInstructionIndex(mi));
199 LiveRange lr(start, end, vni);
200
201 newLI->addRange(lr);
Lang Hamese2b201b2009-05-18 19:03:16 +0000202 }
203
204 if (hasDef) {
205 unsigned storeInstIdx = insertStoreFor(mi, ss, newVReg, trc);
206 unsigned start = lis->getDefIndex(lis->getInstructionIndex(mi)),
207 end = lis->getUseIndex(storeInstIdx);
208
209 VNInfo *vni =
Lang Hames857c4e02009-06-17 21:01:20 +0000210 newLI->getNextValue(storeInstIdx, 0, true, lis->getVNInfoAllocator());
Lang Hamese2b201b2009-05-18 19:03:16 +0000211 vni->kills.push_back(storeInstIdx);
212 LiveRange lr(start, end, vni);
213
214 newLI->addRange(lr);
Lang Hamese2b201b2009-05-18 19:03:16 +0000215 }
216
Lang Hamesf41538d2009-06-02 16:53:25 +0000217 added.push_back(newLI);
Lang Hamese2b201b2009-05-18 19:03:16 +0000218 }
219
Lang Hamese2b201b2009-05-18 19:03:16 +0000220 return added;
221 }
222
Lang Hamesf41538d2009-06-02 16:53:25 +0000223};
Lang Hamese2b201b2009-05-18 19:03:16 +0000224
225
Lang Hamesf41538d2009-06-02 16:53:25 +0000226/// Spills any live range using the spill-everywhere method with no attempt at
227/// folding.
228class TrivialSpiller : public SpillerBase {
229public:
230 TrivialSpiller(MachineFunction *mf, LiveIntervals *lis, LiveStacks *ls, VirtRegMap *vrm) :
231 SpillerBase(mf, lis, ls, vrm) {}
Lang Hamese2b201b2009-05-18 19:03:16 +0000232
Lang Hamesf41538d2009-06-02 16:53:25 +0000233 std::vector<LiveInterval*> spill(LiveInterval *li) {
234 return trivialSpillEverywhere(li);
Lang Hamese2b201b2009-05-18 19:03:16 +0000235 }
236
237};
238
239}
240
Lang Hamese2b201b2009-05-18 19:03:16 +0000241llvm::Spiller* llvm::createSpiller(MachineFunction *mf, LiveIntervals *lis,
Lang Hamesf41538d2009-06-02 16:53:25 +0000242 LiveStacks *ls, VirtRegMap *vrm) {
243 return new TrivialSpiller(mf, lis, ls, vrm);
Lang Hamese2b201b2009-05-18 19:03:16 +0000244}