blob: 91598cdc961a06d9e131c0ffa0146050cf7695d6 [file] [log] [blame]
Jim Grosbach11872852009-11-17 00:20:26 +00001; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
Evan Chengd27c9fc2009-07-03 01:43:10 +00002
3define i32 @test1(i32 %x) {
Jim Grosbach11872852009-11-17 00:20:26 +00004; CHECK: test1
Johnny Chen267124c2010-03-04 22:24:41 +00005; CHECK: uxtb16 r0, r0
Evan Chengd27c9fc2009-07-03 01:43:10 +00006 %tmp1 = and i32 %x, 16711935 ; <i32> [#uses=1]
7 ret i32 %tmp1
8}
9
10define i32 @test2(i32 %x) {
Jim Grosbach11872852009-11-17 00:20:26 +000011; CHECK: test2
Johnny Chen267124c2010-03-04 22:24:41 +000012; CHECK: uxtb16 r0, r0, ror #8
Evan Chengd27c9fc2009-07-03 01:43:10 +000013 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
14 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
15 ret i32 %tmp2
16}
17
18define i32 @test3(i32 %x) {
Jim Grosbach11872852009-11-17 00:20:26 +000019; CHECK: test3
Johnny Chen267124c2010-03-04 22:24:41 +000020; CHECK: uxtb16 r0, r0, ror #8
Evan Chengd27c9fc2009-07-03 01:43:10 +000021 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
22 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
23 ret i32 %tmp2
24}
25
26define i32 @test4(i32 %x) {
Jim Grosbach11872852009-11-17 00:20:26 +000027; CHECK: test4
Johnny Chen267124c2010-03-04 22:24:41 +000028; CHECK: uxtb16 r0, r0, ror #8
Evan Chengd27c9fc2009-07-03 01:43:10 +000029 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
30 %tmp6 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
31 ret i32 %tmp6
32}
33
34define i32 @test5(i32 %x) {
Jim Grosbach11872852009-11-17 00:20:26 +000035; CHECK: test5
Johnny Chen267124c2010-03-04 22:24:41 +000036; CHECK: uxtb16 r0, r0, ror #8
Evan Chengd27c9fc2009-07-03 01:43:10 +000037 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
38 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
39 ret i32 %tmp2
40}
41
42define i32 @test6(i32 %x) {
Jim Grosbach11872852009-11-17 00:20:26 +000043; CHECK: test6
Johnny Chen267124c2010-03-04 22:24:41 +000044; CHECK: uxtb16 r0, r0, ror #16
Evan Chengd27c9fc2009-07-03 01:43:10 +000045 %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1]
46 %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1]
47 %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]
48 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
49 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
50 ret i32 %tmp6
51}
52
53define i32 @test7(i32 %x) {
Jim Grosbach11872852009-11-17 00:20:26 +000054; CHECK: test7
Johnny Chen267124c2010-03-04 22:24:41 +000055; CHECK: uxtb16 r0, r0, ror #16
Evan Chengd27c9fc2009-07-03 01:43:10 +000056 %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1]
57 %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1]
58 %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]
59 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
60 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
61 ret i32 %tmp6
62}
63
64define i32 @test8(i32 %x) {
Jim Grosbach11872852009-11-17 00:20:26 +000065; CHECK: test8
Johnny Chen267124c2010-03-04 22:24:41 +000066; CHECK: uxtb16 r0, r0, ror #24
Evan Chengd27c9fc2009-07-03 01:43:10 +000067 %tmp1 = shl i32 %x, 8 ; <i32> [#uses=1]
68 %tmp2 = and i32 %tmp1, 16711680 ; <i32> [#uses=1]
69 %tmp5 = lshr i32 %x, 24 ; <i32> [#uses=1]
70 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
71 ret i32 %tmp6
72}
73
74define i32 @test9(i32 %x) {
Jim Grosbach11872852009-11-17 00:20:26 +000075; CHECK: test9
Johnny Chen267124c2010-03-04 22:24:41 +000076; CHECK: uxtb16 r0, r0, ror #24
Evan Chengd27c9fc2009-07-03 01:43:10 +000077 %tmp1 = lshr i32 %x, 24 ; <i32> [#uses=1]
78 %tmp4 = shl i32 %x, 8 ; <i32> [#uses=1]
79 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
80 %tmp6 = or i32 %tmp5, %tmp1 ; <i32> [#uses=1]
81 ret i32 %tmp6
82}
83
84define i32 @test10(i32 %p0) {
Jim Grosbach11872852009-11-17 00:20:26 +000085; CHECK: test10
86; CHECK: mov.w r1, #16253176
87; CHECK: and.w r0, r1, r0, lsr #7
88; CHECK: lsrs r1, r0, #5
Johnny Chen267124c2010-03-04 22:24:41 +000089; CHECK: uxtb16 r1, r1
Jim Grosbach11872852009-11-17 00:20:26 +000090; CHECK: orr.w r0, r1, r0
91
Evan Chengd27c9fc2009-07-03 01:43:10 +000092 %tmp1 = lshr i32 %p0, 7 ; <i32> [#uses=1]
93 %tmp2 = and i32 %tmp1, 16253176 ; <i32> [#uses=2]
94 %tmp4 = lshr i32 %tmp2, 5 ; <i32> [#uses=1]
95 %tmp5 = and i32 %tmp4, 458759 ; <i32> [#uses=1]
96 %tmp7 = or i32 %tmp5, %tmp2 ; <i32> [#uses=1]
97 ret i32 %tmp7
98}