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Reid Spencer8874aae2006-05-31 17:54:39 +00001
2=pod
3
4=head1 NAME
5
6tblgen - Target Description To C++ Code Generator
7
8=head1 SYNOPSIS
9
10B<tblgen> [I<options>] [I<filename>]
11
12=head1 DESCRIPTION
13
14B<tblgen> translates from target description (.td) files into C++ code that can
15be included in the definition of an LLVM target library. Most users of LLVM will
16not need to use this program. It is only for assisting with writing an LLVM
17target backend.
18
19The input and output of B<tblgen> is beyond the scope of this short
20introduction. Please see the I<CodeGeneration> page in the LLVM documentation.
21
22The F<filename> argument specifies the name of a Target Description (.td) file
23to read as input.
24
25=head1 OPTIONS
26
27=over
28
Duncan Sands7e7ae5a2010-02-18 14:08:13 +000029=item B<-help>
Reid Spencer8874aae2006-05-31 17:54:39 +000030
31Print a summary of command line options.
32
33=item B<-o> F<filename>
34
35Specify the output file name. If F<filename> is C<->, then B<tblgen>
36sends its output to standard output.
37
38=item B<-I> F<directory>
39
40Specify where to find other target description files for inclusion. The
41F<directory> value should be a full or partial path to a directory that contains
42target description files.
43
Craig Toppera1c5b8e2012-02-27 02:31:09 +000044=item B<-asmparsernum> F<N>
45
46Make -gen-asm-parser emit assembly writer number F<N>.
47
Reid Spencer8874aae2006-05-31 17:54:39 +000048=item B<-asmwriternum> F<N>
49
50Make -gen-asm-writer emit assembly writer number F<N>.
51
52=item B<-class> F<class Name>
53
54Print the enumeration list for this class.
55
56=item B<-print-records>
57
58Print all records to standard output (default).
59
60=item B<-print-enums>
61
62Print enumeration values for a class
63
Craig Toppera1c5b8e2012-02-27 02:31:09 +000064=item B<-print-sets>
65
66Print expanded sets for testing DAG exprs.
67
Reid Spencer8874aae2006-05-31 17:54:39 +000068=item B<-gen-emitter>
69
70Generate machine code emitter.
71
Craig Toppera1c5b8e2012-02-27 02:31:09 +000072=item B<-gen-register-info>
Reid Spencer8874aae2006-05-31 17:54:39 +000073
Craig Toppera1c5b8e2012-02-27 02:31:09 +000074Generate registers and register classes info.
Reid Spencer8874aae2006-05-31 17:54:39 +000075
Craig Toppera1c5b8e2012-02-27 02:31:09 +000076=item B<-gen-instr-info>
Reid Spencer8874aae2006-05-31 17:54:39 +000077
78Generate instruction descriptions.
79
80=item B<-gen-asm-writer>
81
82Generate the assembly writer.
83
Craig Toppera1c5b8e2012-02-27 02:31:09 +000084=item B<-gen-disassembler>
85
86Generate disassembler.
87
88=item B<-gen-pseudo-lowering>
89
90Generate pseudo instruction lowering.
91
Reid Spencer8874aae2006-05-31 17:54:39 +000092=item B<-gen-dag-isel>
93
94Generate a DAG (Directed Acycle Graph) instruction selector.
95
Craig Toppera1c5b8e2012-02-27 02:31:09 +000096=item B<-gen-asm-matcher>
97
98Generate assembly instruction matcher.
99
100=item B<-gen-dfa-packetizer>
101
102Generate DFA Packetizer for VLIW targets.
103
104=item B<-gen-fast-isel>
105
106Generate a "fast" instruction selector.
107
Reid Spencer8874aae2006-05-31 17:54:39 +0000108=item B<-gen-subtarget>
109
110Generate subtarget enumerations.
111
112=item B<-gen-intrinsic>
113
114Generate intrinsic information.
115
Craig Toppera1c5b8e2012-02-27 02:31:09 +0000116=item B<-gen-tgt-intrinsic>
117
118Generate target intrinsic information.
119
120=item B<-gen-enhanced-disassembly-info>
121
122Generate enhanced disassembly info.
123
Reid Spencer8874aae2006-05-31 17:54:39 +0000124=item B<-version>
125
126Show the version number of this program.
127
128=back
129
130=head1 EXIT STATUS
131
132If B<tblgen> succeeds, it will exit with 0. Otherwise, if an error
133occurs, it will exit with a non-zero value.
134
Reid Spencer8874aae2006-05-31 17:54:39 +0000135=head1 AUTHORS
136
NAKAMURA Takumib9a33632011-04-09 02:13:37 +0000137Maintained by The LLVM Team (L<http://llvm.org/>).
Reid Spencer8874aae2006-05-31 17:54:39 +0000138
139=cut