| Scott Michel | b30e8f6 | 2008-12-02 19:53:53 +0000 | [diff] [blame^] | 1 | ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s |
| 2 | ; RUN: grep shufb %t1.s | count 9 |
| 3 | ; RUN: grep {ilhu.*1799} %t1.s | count 1 |
| 4 | ; RUN: grep {ilhu.*771} %t1.s | count 3 |
| 5 | ; RUN: grep {ilhu.*1543} %t1.s | count 1 |
| 6 | ; RUN: grep {ilhu.*1029} %t1.s | count 1 |
| 7 | ; RUN: grep {ilhu.*515} %t1.s | count 1 |
| 8 | ; RUN: grep {iohl.*1799} %t1.s | count 1 |
| 9 | ; RUN: grep {iohl.*771} %t1.s | count 3 |
| 10 | ; RUN: grep {iohl.*1543} %t1.s | count 2 |
| 11 | ; RUN: grep {iohl.*515} %t1.s | count 1 |
| 12 | ; RUN: grep xsbh %t1.s | count 6 |
| 13 | ; RUN: grep sfh %t1.s | count 5 |
| 14 | |
| 15 | ; ModuleID = 'trunc.bc' |
| 16 | target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128" |
| 17 | target triple = "spu" |
| 18 | |
| 19 | ; codegen for i128 arguments is not implemented yet on CellSPU |
| 20 | ; once this changes uncomment the functions below |
| 21 | ; and update the expected results accordingly |
| 22 | |
| 23 | ;define i8 @trunc_i128_i8(i128 %u) nounwind readnone { |
| 24 | ;entry: |
| 25 | ; %0 = trunc i128 %u to i8 |
| 26 | ; ret i8 %0 |
| 27 | ;} |
| 28 | ;define i16 @trunc_i128_i16(i128 %u) nounwind readnone { |
| 29 | ;entry: |
| 30 | ; %0 = trunc i128 %u to i16 |
| 31 | ; ret i16 %0 |
| 32 | ;} |
| 33 | ;define i32 @trunc_i128_i32(i128 %u) nounwind readnone { |
| 34 | ;entry: |
| 35 | ; %0 = trunc i128 %u to i32 |
| 36 | ; ret i32 %0 |
| 37 | ;} |
| 38 | ;define i64 @trunc_i128_i64(i128 %u) nounwind readnone { |
| 39 | ;entry: |
| 40 | ; %0 = trunc i128 %u to i64 |
| 41 | ; ret i64 %0 |
| 42 | ;} |
| 43 | |
| 44 | define i8 @trunc_i64_i8(i64 %u, i8 %v) nounwind readnone { |
| 45 | entry: |
| 46 | %0 = trunc i64 %u to i8 |
| 47 | %1 = sub i8 %0, %v |
| 48 | ret i8 %1 |
| 49 | } |
| 50 | define i16 @trunc_i64_i16(i64 %u, i16 %v) nounwind readnone { |
| 51 | entry: |
| 52 | %0 = trunc i64 %u to i16 |
| 53 | %1 = sub i16 %0, %v |
| 54 | ret i16 %1 |
| 55 | } |
| 56 | define i32 @trunc_i64_i32(i64 %u, i32 %v) nounwind readnone { |
| 57 | entry: |
| 58 | %0 = trunc i64 %u to i32 |
| 59 | %1 = sub i32 %0, %v |
| 60 | ret i32 %1 |
| 61 | } |
| 62 | |
| 63 | define i8 @trunc_i32_i8(i32 %u, i8 %v) nounwind readnone { |
| 64 | entry: |
| 65 | %0 = trunc i32 %u to i8 |
| 66 | %1 = sub i8 %0, %v |
| 67 | ret i8 %1 |
| 68 | } |
| 69 | define i16 @trunc_i32_i16(i32 %u, i16 %v) nounwind readnone { |
| 70 | entry: |
| 71 | %0 = trunc i32 %u to i16 |
| 72 | %1 = sub i16 %0, %v |
| 73 | ret i16 %1 |
| 74 | } |
| 75 | |
| 76 | define i8 @trunc_i16_i8(i16 %u, i8 %v) nounwind readnone { |
| 77 | entry: |
| 78 | %0 = trunc i16 %u to i8 |
| 79 | %1 = sub i8 %0, %v |
| 80 | ret i8 %1 |
| 81 | } |