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Duraid Madina9b9d45f2005-03-17 18:17:03 +00001//===- IA64InstrInfo.h - IA64 Instruction Information ----------*- C++ -*- ===//
Misha Brukman4633f1c2005-04-21 23:13:11 +00002//
Duraid Madina9b9d45f2005-03-17 18:17:03 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukman4633f1c2005-04-21 23:13:11 +00007//
Duraid Madina9b9d45f2005-03-17 18:17:03 +00008//===----------------------------------------------------------------------===//
9//
10// This file contains the IA64 implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef IA64INSTRUCTIONINFO_H
15#define IA64INSTRUCTIONINFO_H
16
17#include "llvm/Target/TargetInstrInfo.h"
18#include "IA64RegisterInfo.h"
19
20namespace llvm {
21
Chris Lattner64105522008-01-01 01:03:04 +000022class IA64InstrInfo : public TargetInstrInfoImpl {
Duraid Madina9b9d45f2005-03-17 18:17:03 +000023 const IA64RegisterInfo RI;
24public:
25 IA64InstrInfo();
26
27 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
28 /// such, whenever a client has an instance of instruction info, it should
29 /// always be able to get register info as well (through this method).
30 ///
Dan Gohmanc9f5f3f2008-05-14 01:58:56 +000031 virtual const IA64RegisterInfo &getRegisterInfo() const { return RI; }
Duraid Madina9b9d45f2005-03-17 18:17:03 +000032
Evan Cheng04ee5a12009-01-20 19:12:24 +000033 /// Return true if the instruction is a register to register move and return
34 /// the source and dest operands and their sub-register indices by reference.
35 virtual bool isMoveInstr(const MachineInstr &MI,
36 unsigned &SrcReg, unsigned &DstReg,
37 unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
Evan Chengb5cdaa22007-05-18 00:05:48 +000038 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
39 MachineBasicBlock *FBB,
Owen Anderson44eb65c2008-08-14 22:49:33 +000040 const SmallVectorImpl<MachineOperand> &Cond) const;
Owen Anderson940f83e2008-08-26 18:03:31 +000041 virtual bool copyRegToReg(MachineBasicBlock &MBB,
Owen Andersond10fd972007-12-31 06:32:00 +000042 MachineBasicBlock::iterator MI,
43 unsigned DestReg, unsigned SrcReg,
44 const TargetRegisterClass *DestRC,
45 const TargetRegisterClass *SrcRC) const;
Owen Andersonf6372aa2008-01-01 21:11:32 +000046 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
47 MachineBasicBlock::iterator MI,
48 unsigned SrcReg, bool isKill, int FrameIndex,
49 const TargetRegisterClass *RC) const;
50
51 virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
52 SmallVectorImpl<MachineOperand> &Addr,
53 const TargetRegisterClass *RC,
54 SmallVectorImpl<MachineInstr*> &NewMIs) const;
55
56 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
57 MachineBasicBlock::iterator MI,
58 unsigned DestReg, int FrameIndex,
59 const TargetRegisterClass *RC) const;
60
61 virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
62 SmallVectorImpl<MachineOperand> &Addr,
63 const TargetRegisterClass *RC,
64 SmallVectorImpl<MachineInstr*> &NewMIs) const;
Duraid Madina9b9d45f2005-03-17 18:17:03 +000065};
66
67} // End llvm namespace
68
69#endif
70