| Chris Lattner | f5a0892 | 2001-07-15 00:23:59 +0000 | [diff] [blame] | 1 | Date: Sun, 8 Jul 2001 10:02:20 -0500 |
| 2 | From: Vikram S. Adve <vadve@cs.uiuc.edu> |
| 3 | To: vadve@cs.uiuc.edu, Ruchira Sasanka <sasanka@students.uiuc.edu> |
| 4 | Cc: Chris Lattner <lattner@cs.uiuc.edu> |
| 5 | Subject: RE: machine instruction operands |
| 6 | |
| 7 | I got interrupted and forgot to explain the example. In that case: |
| 8 | |
| 9 | reg will be the 3rd operand of MUL and it will be of type |
| 10 | MO_MInstrVirtualReg. The field MachineInstr* minstr will point to the |
| 11 | instruction that computes reg. |
| 12 | |
| 13 | numElements will be an immediate constant, not a register. |
| 14 | |
| 15 | %sp will be operand 1 of ADD and it will be of type MO_MachineReg. The |
| 16 | field regNum identifies the register. |
| 17 | |
| 18 | numElements will be operand 2 of ADD and it will be of type |
| 19 | MO_VMVirtualReg. The field Value* value identifies the value. |
| 20 | |
| 21 | ptr will be operand 3 of ADD will also be %sp, i.e., of |
| 22 | type MO_MachineReg. regNum identifies the register. |
| 23 | |
| 24 | --Vikram |
| 25 | |