Jia Liu | 31d157a | 2012-02-18 12:03:15 +0000 | [diff] [blame] | 1 | //===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===// |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains the ARM implementation of the TargetInstrInfo class. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef ARMINSTRUCTIONINFO_H |
| 15 | #define ARMINSTRUCTIONINFO_H |
| 16 | |
Craig Topper | c1f6f42 | 2012-03-17 07:33:42 +0000 | [diff] [blame] | 17 | #include "ARM.h" |
David Goodwin | 334c264 | 2009-07-08 16:09:28 +0000 | [diff] [blame] | 18 | #include "ARMBaseInstrInfo.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 19 | #include "ARMRegisterInfo.h" |
David Goodwin | 334c264 | 2009-07-08 16:09:28 +0000 | [diff] [blame] | 20 | #include "ARMSubtarget.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 21 | |
| 22 | namespace llvm { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 23 | class ARMSubtarget; |
| 24 | |
David Goodwin | b50ea5c | 2009-07-02 22:18:33 +0000 | [diff] [blame] | 25 | class ARMInstrInfo : public ARMBaseInstrInfo { |
| 26 | ARMRegisterInfo RI; |
| 27 | public: |
| 28 | explicit ARMInstrInfo(const ARMSubtarget &STI); |
| 29 | |
Jim Grosbach | c01810e | 2012-02-28 23:53:30 +0000 | [diff] [blame] | 30 | /// getNoopForMachoTarget - Return the noop instruction to use for a noop. |
| 31 | void getNoopForMachoTarget(MCInst &NopInst) const; |
| 32 | |
David Goodwin | 334c264 | 2009-07-08 16:09:28 +0000 | [diff] [blame] | 33 | // Return the non-pre/post incrementing version of 'Opc'. Return 0 |
| 34 | // if there is not such an opcode. |
| 35 | unsigned getUnindexedOpcode(unsigned Opc) const; |
| 36 | |
David Goodwin | b50ea5c | 2009-07-02 22:18:33 +0000 | [diff] [blame] | 37 | /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As |
| 38 | /// such, whenever a client has an instance of instruction info, it should |
| 39 | /// always be able to get register info as well (through this method). |
| 40 | /// |
| 41 | const ARMRegisterInfo &getRegisterInfo() const { return RI; } |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 42 | }; |
| 43 | |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 44 | } |
| 45 | |
| 46 | #endif |