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Dan Gohmanf17a25c2007-07-18 16:29:46 +00001//===- Sparc.td - Describe the Sparc Target Machine -------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner081ce942007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Dan Gohmanf17a25c2007-07-18 16:29:46 +00007//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13//===----------------------------------------------------------------------===//
14// Target-independent interfaces which we are implementing
15//===----------------------------------------------------------------------===//
16
17include "../Target.td"
18
19//===----------------------------------------------------------------------===//
20// SPARC Subtarget features.
21//
22
23def FeatureV9
24 : SubtargetFeature<"v9", "IsV9", "true",
25 "Enable SPARC-V9 instructions">;
26def FeatureV8Deprecated
27 : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true",
28 "Enable deprecated V8 instructions in V9 mode">;
29def FeatureVIS
30 : SubtargetFeature<"vis", "IsVIS", "true",
31 "Enable UltraSPARC Visual Instruction Set extensions">;
32
33//===----------------------------------------------------------------------===//
Chris Lattnerc9d7b7d2008-03-17 05:41:48 +000034// Register File, Calling Conv, Instruction Descriptions
Dan Gohmanf17a25c2007-07-18 16:29:46 +000035//===----------------------------------------------------------------------===//
36
37include "SparcRegisterInfo.td"
Chris Lattnerc9d7b7d2008-03-17 05:41:48 +000038include "SparcCallingConv.td"
Dan Gohmanf17a25c2007-07-18 16:29:46 +000039include "SparcInstrInfo.td"
40
41def SparcInstrInfo : InstrInfo {
42 // Define how we want to layout our target-specific information field.
43 let TSFlagsFields = [];
44 let TSFlagsShifts = [];
45}
46
47//===----------------------------------------------------------------------===//
48// SPARC processors supported.
49//===----------------------------------------------------------------------===//
50
51class Proc<string Name, list<SubtargetFeature> Features>
52 : Processor<Name, NoItineraries, Features>;
53
54def : Proc<"generic", []>;
55def : Proc<"v8", []>;
56def : Proc<"supersparc", []>;
57def : Proc<"sparclite", []>;
58def : Proc<"f934", []>;
59def : Proc<"hypersparc", []>;
60def : Proc<"sparclite86x", []>;
61def : Proc<"sparclet", []>;
62def : Proc<"tsc701", []>;
63def : Proc<"v9", [FeatureV9]>;
64def : Proc<"ultrasparc", [FeatureV9, FeatureV8Deprecated]>;
65def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated]>;
66def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
67
68
69//===----------------------------------------------------------------------===//
70// Declare the target which we are implementing
71//===----------------------------------------------------------------------===//
72
73def Sparc : Target {
74 // Pull in Instruction Info:
75 let InstructionSet = SparcInstrInfo;
76}