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Tom Stellardf98f2ce2012-12-11 21:25:42 +00001//===-- AMDGPUSubtarget.cpp - AMDGPU Subtarget Information ----------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief Implements the AMDGPU specific subclass of TargetSubtarget.
12//
13//===----------------------------------------------------------------------===//
14
15#include "AMDGPUSubtarget.h"
16
17using namespace llvm;
18
19#define GET_SUBTARGETINFO_ENUM
20#define GET_SUBTARGETINFO_TARGET_DESC
21#define GET_SUBTARGETINFO_CTOR
22#include "AMDGPUGenSubtargetInfo.inc"
23
24AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
25 AMDGPUGenSubtargetInfo(TT, CPU, FS), DumpCode(false) {
26 InstrItins = getInstrItineraryForCPU(CPU);
27
Tom Stellardf98f2ce2012-12-11 21:25:42 +000028 // Default card
29 StringRef GPU = CPU;
30 Is64bit = false;
31 DefaultSize[0] = 64;
32 DefaultSize[1] = 1;
33 DefaultSize[2] = 1;
Vincent Lejeune631591e2013-04-30 00:13:39 +000034 HasVertexCache = false;
Tom Stellardce961472013-06-07 20:28:55 +000035 TexVTXClauseSize = 0;
Tom Stellard3ff0abf2013-06-07 20:37:48 +000036 Gen = AMDGPUSubtarget::R600;
37 FP64 = false;
38 CaymanISA = false;
Tom Stellardf98f2ce2012-12-11 21:25:42 +000039 ParseSubtargetFeatures(GPU, FS);
40 DevName = GPU;
Tom Stellardf98f2ce2012-12-11 21:25:42 +000041}
42
Tom Stellardf98f2ce2012-12-11 21:25:42 +000043bool
44AMDGPUSubtarget::is64bit() const {
45 return Is64bit;
46}
47bool
Vincent Lejeune631591e2013-04-30 00:13:39 +000048AMDGPUSubtarget::hasVertexCache() const {
49 return HasVertexCache;
50}
Vincent Lejeunedcfcf1d2013-05-17 16:49:55 +000051short
52AMDGPUSubtarget::getTexVTXClauseSize() const {
53 return TexVTXClauseSize;
54}
Tom Stellard3ff0abf2013-06-07 20:37:48 +000055enum AMDGPUSubtarget::Generation
56AMDGPUSubtarget::getGeneration() const {
57 return Gen;
58}
59bool
60AMDGPUSubtarget::hasHWFP64() const {
61 return FP64;
62}
63bool
64AMDGPUSubtarget::hasCaymanISA() const {
65 return CaymanISA;
66}
Vincent Lejeune631591e2013-04-30 00:13:39 +000067bool
Tom Stellardf98f2ce2012-12-11 21:25:42 +000068AMDGPUSubtarget::isTargetELF() const {
69 return false;
70}
71size_t
72AMDGPUSubtarget::getDefaultSize(uint32_t dim) const {
73 if (dim > 3) {
74 return 1;
75 } else {
76 return DefaultSize[dim];
77 }
78}
79
80std::string
81AMDGPUSubtarget::getDataLayout() const {
Tom Stellard3ff0abf2013-06-07 20:37:48 +000082 std::string DataLayout = std::string(
83 "e"
84 "-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32"
85 "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128"
86 "-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048"
87 "-n32:64"
88 );
89
90 if (hasHWFP64()) {
91 DataLayout.append("-f64:64:64");
92 }
93
94 if (is64bit()) {
95 DataLayout.append("-p:64:64:64");
96 } else {
97 DataLayout.append("-p:32:32:32");
98 }
99
Tom Stellardda25cd32013-08-26 15:05:36 +0000100 if (Gen >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
101 DataLayout.append("-p3:32:32:32");
102 }
103
Tom Stellard3ff0abf2013-06-07 20:37:48 +0000104 return DataLayout;
Tom Stellardf98f2ce2012-12-11 21:25:42 +0000105}
106
107std::string
108AMDGPUSubtarget::getDeviceName() const {
109 return DevName;
110}