Shih-wei Liao | e445432 | 2010-04-07 12:21:42 -0700 | [diff] [blame^] | 1 | ########################################################### |
| 2 | ## Commands for running tblgen to compile a td file |
| 3 | ########################################################## |
| 4 | define transform-td-to-out |
| 5 | $(if $(LOCAL_IS_HOST_MODULE), \ |
| 6 | $(call transform-host-td-to-out,$(1)), \ |
| 7 | $(call transform-device-td-to-out,$(1))) |
| 8 | endef |
| 9 | |
| 10 | ########################################################### |
| 11 | ## TableGen: Compile .td files to .inc. |
| 12 | ########################################################### |
| 13 | ifeq ($(LOCAL_MODULE_CLASS),) |
| 14 | LOCAL_MODULE_CLASS := STATIC_LIBRARIES |
| 15 | endif |
| 16 | |
| 17 | ifneq ($(strip $(TBLGEN_TABLES)),) |
| 18 | |
| 19 | intermediates := $(call local-intermediates-dir) |
| 20 | tblgen_gen_tables := $(addprefix $(intermediates)/,$(TBLGEN_TABLES)) |
| 21 | LOCAL_GENERATED_SOURCES += $(tblgen_gen_tables) |
| 22 | |
| 23 | tblgen_source_dir := $(LOCAL_PATH) |
| 24 | ifneq ($(TBLGEN_TD_DIR),) |
| 25 | tblgen_source_dir := $(TBLGEN_TD_DIR) |
| 26 | endif |
| 27 | |
| 28 | ifneq ($(filter %GenRegisterNames.inc,$(tblgen_gen_tables)),) |
| 29 | $(intermediates)/%GenRegisterNames.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 30 | $(call transform-td-to-out,register-enums) |
| 31 | endif |
| 32 | |
| 33 | ifneq ($(filter %GenRegisterInfo.h.inc,$(tblgen_gen_tables)),) |
| 34 | $(intermediates)/%GenRegisterInfo.h.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 35 | $(call transform-td-to-out,register-desc-header) |
| 36 | endif |
| 37 | |
| 38 | ifneq ($(filter %GenRegisterInfo.inc,$(tblgen_gen_tables)),) |
| 39 | $(intermediates)/%GenRegisterInfo.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 40 | $(call transform-td-to-out,register-desc) |
| 41 | endif |
| 42 | |
| 43 | ifneq ($(filter %GenInstrNames.inc,$(tblgen_gen_tables)),) |
| 44 | $(intermediates)/%GenInstrNames.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 45 | $(call transform-td-to-out,instr-enums) |
| 46 | endif |
| 47 | |
| 48 | ifneq ($(filter %GenInstrInfo.inc,$(tblgen_gen_tables)),) |
| 49 | $(intermediates)/%GenInstrInfo.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 50 | $(call transform-td-to-out,instr-desc) |
| 51 | endif |
| 52 | |
| 53 | ifneq ($(filter %GenAsmWriter.inc,$(tblgen_gen_tables)),) |
| 54 | $(intermediates)/%GenAsmWriter.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 55 | $(call transform-td-to-out,asm-writer) |
| 56 | endif |
| 57 | |
| 58 | ifneq ($(filter %GenAsmWriter1.inc,$(tblgen_gen_tables)),) |
| 59 | $(intermediates)/%GenAsmWriter1.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 60 | $(call transform-td-to-out,asm-writer -asmwriternum=1) |
| 61 | endif |
| 62 | |
| 63 | ifneq ($(filter %GenAsmMatcher.inc,$(tblgen_gen_tables)),) |
| 64 | $(intermediates)/%GenAsmMatcher.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 65 | $(call transform-td-to-out,asm-matcher) |
| 66 | endif |
| 67 | |
| 68 | ifneq ($(filter %GenCodeEmitter.inc,$(tblgen_gen_tables)),) |
| 69 | $(intermediates)/%GenCodeEmitter.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 70 | $(call transform-td-to-out,emitter) |
| 71 | endif |
| 72 | |
| 73 | ifneq ($(filter %GenDAGISel.inc,$(tblgen_gen_tables)),) |
| 74 | $(intermediates)/%GenDAGISel.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 75 | $(call transform-td-to-out,dag-isel) |
| 76 | endif |
| 77 | |
| 78 | ifneq ($(filter %GenDisassemblerTables.inc,$(tblgen_gen_tables)),) |
| 79 | $(intermediates)/%GenDisassemblerTables.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 80 | $(call transform-td-to-out,disassembler) |
| 81 | endif |
| 82 | |
| 83 | ifneq ($(filter %GenEDInfo.inc,$(tblgen_gen_tables)),) |
| 84 | $(intermediates)/%GenEDInfo.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 85 | $(call transform-td-to-out,enhanced-disassembly-info) |
| 86 | endif |
| 87 | |
| 88 | ifneq ($(filter %GenFastISel.inc,$(tblgen_gen_tables)),) |
| 89 | $(intermediates)/%GenFastISel.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 90 | $(call transform-td-to-out,fast-isel) |
| 91 | endif |
| 92 | |
| 93 | ifneq ($(filter %GenSubtarget.inc,$(tblgen_gen_tables)),) |
| 94 | $(intermediates)/%GenSubtarget.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 95 | $(call transform-td-to-out,subtarget) |
| 96 | endif |
| 97 | |
| 98 | ifneq ($(filter %GenCallingConv.inc,$(tblgen_gen_tables)),) |
| 99 | $(intermediates)/%GenCallingConv.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 100 | $(call transform-td-to-out,callingconv) |
| 101 | endif |
| 102 | |
| 103 | ifneq ($(filter %GenIntrinsics.inc,$(tblgen_gen_tables)),) |
| 104 | $(intermediates)/%GenIntrinsics.inc: $(tblgen_source_dir)/%.td $(TBLGEN) |
| 105 | $(call transform-td-to-out,tgt_intrinsics) |
| 106 | endif |
| 107 | |
| 108 | endif |