blob: eb5e28f131d227e79801087282fb4749bcd068f0 [file] [log] [blame]
Wesley Pecka70f28c2010-02-23 19:15:24 +00001//===- MBlazeSubtarget.cpp - MBlaze Subtarget Information -------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
Evan Cheng5b1b44892011-07-01 21:01:15 +000010// This file implements the MBlaze specific subclass of TargetSubtargetInfo.
Wesley Pecka70f28c2010-02-23 19:15:24 +000011//
12//===----------------------------------------------------------------------===//
13
14#include "MBlazeSubtarget.h"
15#include "MBlaze.h"
Wesley Peck3d820ba2011-04-11 22:31:52 +000016#include "MBlazeRegisterInfo.h"
Wesley Pecka70f28c2010-02-23 19:15:24 +000017#include "llvm/Support/CommandLine.h"
Evan Cheng94214702011-07-01 20:45:01 +000018
Evan Chengebdeeab2011-07-08 01:53:10 +000019#define GET_SUBTARGETINFO_ENUM
Evan Cheng94214702011-07-01 20:45:01 +000020#define GET_SUBTARGETINFO_MC_DESC
21#define GET_SUBTARGETINFO_TARGET_DESC
Evan Chengebdeeab2011-07-08 01:53:10 +000022#define GET_SUBTARGETINFO_CTOR
Evan Cheng385e9302011-07-01 22:36:09 +000023#include "MBlazeGenSubtargetInfo.inc"
Evan Cheng94214702011-07-01 20:45:01 +000024
Wesley Pecka70f28c2010-02-23 19:15:24 +000025using namespace llvm;
26
Evan Cheng276365d2011-06-30 01:53:36 +000027MBlazeSubtarget::MBlazeSubtarget(const std::string &TT,
28 const std::string &CPU,
29 const std::string &FS):
Evan Cheng0ddff1b2011-07-07 07:07:08 +000030 MBlazeGenSubtargetInfo(TT, CPU, FS),
Wesley Peck3d820ba2011-04-11 22:31:52 +000031 HasBarrel(false), HasDiv(false), HasMul(false), HasPatCmp(false),
32 HasFPU(false), HasMul64(false), HasSqrt(false)
Wesley Pecka70f28c2010-02-23 19:15:24 +000033{
Wesley Pecka70f28c2010-02-23 19:15:24 +000034 // Parse features string.
Evan Cheng276365d2011-06-30 01:53:36 +000035 std::string CPUName = CPU;
36 if (CPUName.empty())
37 CPUName = "mblaze";
Evan Cheng0ddff1b2011-07-07 07:07:08 +000038 ParseSubtargetFeatures(CPUName, FS);
Wesley Peck3d820ba2011-04-11 22:31:52 +000039
40 // Only use instruction scheduling if the selected CPU has an instruction
41 // itinerary (the default CPU is the only one that doesn't).
Evan Cheng276365d2011-06-30 01:53:36 +000042 HasItin = CPUName != "mblaze";
43 DEBUG(dbgs() << "CPU " << CPUName << "(" << HasItin << ")\n");
Wesley Peck3d820ba2011-04-11 22:31:52 +000044
Evan Cheng94214702011-07-01 20:45:01 +000045 // Initialize scheduling itinerary for the specified CPU.
46 InstrItins = getInstrItineraryForCPU(CPUName);
47
Wesley Peck3d820ba2011-04-11 22:31:52 +000048 // Compute the issue width of the MBlaze itineraries
49 computeIssueWidth();
Wesley Pecka70f28c2010-02-23 19:15:24 +000050}
Wesley Peck3d820ba2011-04-11 22:31:52 +000051
52void MBlazeSubtarget::computeIssueWidth() {
53 InstrItins.IssueWidth = 1;
54}
55
56bool MBlazeSubtarget::
57enablePostRAScheduler(CodeGenOpt::Level OptLevel,
Evan Cheng5b1b44892011-07-01 21:01:15 +000058 TargetSubtargetInfo::AntiDepBreakMode& Mode,
Wesley Peck3d820ba2011-04-11 22:31:52 +000059 RegClassVector& CriticalPathRCs) const {
Evan Cheng5b1b44892011-07-01 21:01:15 +000060 Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL;
Wesley Peck3d820ba2011-04-11 22:31:52 +000061 CriticalPathRCs.clear();
62 CriticalPathRCs.push_back(&MBlaze::GPRRegClass);
63 return HasItin && OptLevel >= CodeGenOpt::Default;
64}